Proceedings of the 20th Conference on Formal Methods in Computer-Aided Design – FMCAD 2020

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Book details Buch-Details

Book title Buchtitel
Proceedings of the 20th Conference on Formal Methods in Computer-Aided Design – FMCAD 2020
 
ISBN
978-3-85448-042-6
 
Pages Seiten
269
 
Editor Herausgeber_in
 
Publisher Herausgeber
TU Wien Academic Press
 
Place of publishing Erscheinungsort
Wien
 
First Edition Erstausgabe
First Edition
 
Volume Band
1
 

Publications Publikationen

Results 21-34 of 34 (Search time: 0.005 seconds).

PreviewAuthor(s)TitleTypeIssue Date
2115_Reactive Synthesis from Extended Bounded Response LTL Specifications.pdf.jpgCimatti, Alessandro ; GEATTI, Luca ; Gigante, Nicola ; MONTANARI, Angelo ; Tonetta, Stefano Reactive Synthesis from Extended Bounded Response LTL SpecificationsInproceedings Konferenzbeitrag 2020
2230_Reductions for Strings and Regular Expressions.pdf.jpgReynolds, Andrew ; Nötzli, Andres ; Barrett, Clark ; Tinelli, Cesare Reductions for Strings and Regular Expressions RevisitedKonferenzbeitrag Inproceedings 2020
2310_Runtime Verification on FPGAs with LTLf Specifications.pdf.jpgTracy II, Tommy ; Tabajara, Lucas ; Vardi, Moshe ; Skadron, Kevin Runtime Verification on FPGAs with LTLf SpecificationsInproceedings Konferenzbeitrag 2020
2419_Selecting Stable Safe Configurations for Systems Modelled by Neural Networks with ReLU Activation.pdf.jpgBrauße, Franz ; Khasidashvili, Zurab ; Korovin, Konstantin Selecting Stable Safe Configurations for Systems Modelled by Neural Networks with ReLU ActivationKonferenzbeitrag Inproceedings 2020
2532_Smart Induction for Isabelle_HOL (Tool Paper).pdf.jpgNagashima, Yutaka Smart Induction for Isabelle/HOL (Tool Paper)Konferenzbeitrag Inproceedings 2020
2631_SWITSS Computing Small Witnessing Subsystems.pdf.jpgJantsch, Simon ; Harder, Hans ; Funke, Florian ; Baier, Christel SWITSS: Computing Small Witnessing SubsystemsKonferenzbeitrag Inproceedings 2020
2716_SYSLITE Syntax-Guided Synthesis of PLTL Formulas from Finite Traces.pdf.jpgArif, M. Fareed ; Larraz, Daniel ; Echeverria, Mitziu ; Reynolds, Andrew ; Chowdhury, Omar ; Tinelli, Cesare SYSLITE: Syntax-Guided Synthesis of PLTL Formulas from Finite TracesInproceedings Konferenzbeitrag 2020
2829_Ternary Propagation-Based Local Search for More Bit_Precise Reasoning.pdf.jpgNiemetz, Aina ; Preiner, Mathias Ternary Propagation-Based Local Search for More Bit-Precise ReasoningKonferenzbeitrag Inproceedings 2020
2909_A Theoretical Framework for Symbolic Quick Error Detection.pdf.jpgLonsing, Florian ; Mitra, Subhasish ; Barrett, Clark A Theoretical Framework for Symbolic Quick Error DetectionKonferenzbeitrag Inproceedings 2020
3013_Thread-modular Counter Abstraction for Parameterized Program Safety.pdf.jpgPani, Thomas ; Weissenbacher, Georg ; Zuleger, Florian Thread-modular Counter Abstraction for Parameterized Program SafetyKonferenzbeitrag Inproceedings 2020
3133_Trace Logic for Inductive Loop Reasoning.pdf.jpgGeorgiou, Pamina ; Gleiss, Bernhard ; Kovacs, Laura Trace Logic for Inductive Loop ReasoningKonferenzbeitrag Inproceedings 2020
3203_Tutorial on World_Level Model Checking.pdf.jpgBiere, Armin Tutorial on World-Level Model CheckingKonferenzbeitrag Inproceedings 2020
3326_Using model checking tools to triage the severity of security bugs in the Xen hypervisor.pdf.jpgCook, Byron ; Döbel, Björn ; Kroening, Daniel ; Manthey, Norbert ; Pohlack, Martin ; Polgreen, Elizabeth ; Tautschnig, Michael ; Wieczorkiewicz, Pawel Using model checking tools to triage the severity of security bugs in the Xen hypervisorKonferenzbeitrag Inproceedings 2020
3427_Verifying Properties of Bit_vector Multiplication Using Cutting Planes Reasoning.pdf.jpgLiew, Vincent ; Beame, Paul ; Devriendt, Jo ; Elffers, Jan ; Nordström, Jakob Verifying Properties of Bit-vector Multiplication Using Cutting Planes ReasoningKonferenzbeitrag Inproceedings 2020