Digital Modeling of Asynchronous Integrated Circuits

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Primary Data

Project Acronym Projekt Kurzbezeichnung
DMAC
 
Project Title (de) Projekttitel (de)
Digital Modeling of Asynchronous Integrated Circuits
 
Project Title (en) Projekttitel (en)
Digital Modeling of Asynchronous Integrated Circuits
 
Consortium Coordinator Koordinator des Konsortiums
 
Principal Investigator Projektleiter_in
 

Grants

Funder/Funding Agency Fördergeber
FWF - Österr. Wissenschaftsfonds
Grant number Förderkennnummer
P32431-N30
 

Publications

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Author:  Maier, Jurgen

Results 1-4 of 4 (Search time: 0.002 seconds).

PreviewAuthor(s)TitleTypeIssue Date
1Ferdowsi, Arman ; Maier, Jurgen ; Öhlinger, Daniel ; Schmid, Ulrich A Simple Hybrid Model for Accurate Delay Modeling of a Multi-Input GateInproceedings Konferenzbeitrag 2022
2Maier-2021-Gain and Pain of a Reliable Delay Model-am.pdf.jpgMaier, Jürgen Gain and Pain of a Reliable Delay ModelInproceedings Konferenzbeitrag 11-Oct-2021
3Maier-2021-A Composable Glitch-Aware Delay Model-vor.pdf.jpgMaier, Jürgen ; Öhlinger, Daniel ; Schmid, Ulrich ; Függer, Matthias ; Nowak, Thomas A Composable Glitch-Aware Delay ModelInproceedings Konferenzbeitrag 22-Jun-2021
4OEhlinger Daniel - 2020 - The involution tool for accurate digital timing and...pdf.jpgÖhlinger, Daniel ; Maier, Jürgen ; Függer, Matthias ; Schmid, Ulrich The involution tool for accurate digital timing and power analysisArticle Artikel Sep-2020