Institut für Technische Informatik

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Organization Name (de) Name der Organisation (de)
E182 - Institut für Technische Informatik
 
Code Kennzahl
E182
 
Type of Organization Organisationstyp
Institute
Parent OrgUnit Übergeordnete Organisation
 
 

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NameCountryRorId
E1821 - Abteilung f.Echtzeitsysteme u.Softwaretechnologie

OrgUnit's Publications


Results 181-200 of 227 (Search time: 0.012 seconds).

PreviewAuthor(s)TitleTypeIssue Date
181Gallo, Raffaele Revision and verification of an enhanced UARTThesis Hochschulschrift2005
182Huber Wolfgang - 2005 - Design of an asynchronous processor based on code...pdf.jpgHuber, Wolfgang Design of an asynchronous processor based on code alternation logic - exploration of delay insensitivityThesis Hochschulschrift 2005
183Schoeberl Martin - 2005 - JOP a Java optimized processor for embedded real-time...pdf.jpgSchöberl, Martin JOP: a Java optimized processor for embedded real-time systemsThesis Hochschulschrift 2005
184Moser Heinrich - 2005 - Distributed construction of a fault-tolerant wireless...pdf.jpgMoser, Heinrich Distributed construction of a fault-tolerant wireless communication topology for networked embedded systems oder "Implementing the Thallner-algorithm"Thesis Hochschulschrift 2005
185Hutle Martin - 2005 - Failure detection in sparse networks.pdf.jpgHutle, Martin Failure detection in sparse networksThesis Hochschulschrift 2005
186Peti Philipp - 2005 - Diagnosis and maintenance in an integrated time-triggered...pdf.jpgPeti, Philipp Diagnosis and maintenance in an integrated time-triggered architectureThesis Hochschulschrift 2005
187Huber, BernhardWireless real-time communication for smart transducer networksThesis Hochschulschrift2004
188Benesch, Roman TCP für die time-triggered architectureThesis Hochschulschrift2004
189Albeseder, Daniel Experimentelle Verifikation von Synchronitätsannahmen für ComputernetzwerkeThesis Hochschulschrift2004
190Tummeltshammer, Peter Multiple constant multiplication by time-multiplexed mapping of addition chainsThesis Hochschulschrift2004
11Handl, Thomas Implementierung eines FPGA-basierten Hardware-FehlerinjektorsThesis Hochschulschrift2004
12Steiner, Wilfried Startup and recovery of fault-tolerant time-triggered communicationThesis Hochschulschrift2004
13Smaili Idriz - 2004 - Real-time monitoring for the time-triggered architecture.pdf.jpgSmaili, Idriz Real-time monitoring for the time-triggered architectureThesis Hochschulschrift 2004
14Delvai Martin - 2004 - Design of an asynchronous processor based on code...pdf.jpgDelvai, Martin Design of an asynchronous processor based on code alternation logic - treatment of non-linear data pathsThesis Hochschulschrift 2004
15Widder Josef - 2004 - Distributed computing in the presence of bounded...pdf.jpgWidder, Josef Distributed computing in the presence of bounded asynchronyThesis Hochschulschrift 2004
16Hanzlik Alexander - 2004 - Investigation of fault-tolerant multi-cluster clock...pdf.jpgHanzlik, Alexander Investigation of fault-tolerant multi-cluster clock synchronization strategies by means of simulationThesis Hochschulschrift 2004
17Borovicka, Michael C. A. V. Design of a gateway for the interconnection of real-time communication hierarchiesThesis Hochschulschrift2003
18Obermaisser, Roman An integrated architecture for event-triggered and time-triggered control paradigmsThesis Hochschulschrift2003
19Ademaj, Astrit Assessment of error detection mechanisms of the time-triggered architecture using fault injectionThesis Hochschulschrift2003
20Pedram, Tarannom Asynchrone Realisierung einer Arithmetic Logic UnitThesis Hochschulschrift2003