Asynchronous Logic in Real-Time Systems

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Primary Data

Project Acronym Projekt Kurzbezeichnung
ARTS
 
Project Title (de) Projekttitel (de)
Asynchronous Logic in Real-Time Systems
 
Project Title (en) Projekttitel (en)
Asynchronous Logic in Real-Time Systems
 
Consortium Coordinator Koordinator des Konsortiums
 
Principal Investigator Projektleiter_in
 

Grants

Funder/Funding Agency Fördergeber
FFG - Österr. Forschungsförderungs- gesellschaft mbH
Grant number Förderkennnummer
813578/1729
 

Publications

Results 1-6 of 6 (Search time: 0.002 seconds).

PreviewAuthors / EditorsTitleTypeIssue Date
1Ferringer, M. Conversion of two- to four-phase delay-insensitive asynchronous circuitsKonferenzbeitrag Inproceedings 2011
2Ferringer, Markus Conversion and interfacing techniques for asynchronous circuitsKonferenzbeitrag Inproceedings 2011
3Ferringer, Markus Investigating the impact of process variations on an asynchronous Time-Triggered-Protocol controllerKonferenzbeitrag Inproceedings 2011
4Ferringer, Markus On Self-Timed Circuits in Real-Time SystemsArtikel Article2011
5Ferringer, Markus Investigating Self-Timed Circuits for the Time-Triggered ProtocolKonferenzbeitrag Inproceedings 2010
6Ferringer, Markus Coupling Asynchronous Signals into Asynchronous LogicKonferenzbeitrag Inproceedings 2009