Name Card

Full name Familienname, Vorname
Heer, Michael
 
Main Affiliation Organisations­zuordnung
 

Own Publications Eigene Publikationen

Results 1-20 of 23 (Search time: 0.001 seconds).

PreviewAuthor(s)TitleTypeIssue Date
1Rigato, Matteo ; Fleury, Clément ; Heer, Michael ; Capriotti, Mattia ; Simbürger, Werner ; Pogany, Dionyz ESD characterization of mulit-finger RF nMOSFET transistors by TLP and transient interferometric mapping techniqueArtikel Article 2015
2Rigato, Matteo ; Fleury, Clement ; Heer, Michael ; Simbürger, Werner ; Pogany, Dionyz ESD characterization of multi-finger RF nMOSFET transistors by TLP and transient interferometric mapping techniquePräsentation Presentation2015
3Heer Michael - 2012 - Semiconductor devices and integrated circuits under short...pdf.jpgHeer, Michael Semiconductor devices and integrated circuits under short electrical stressThesis Hochschulschrift 2012
4Pogany, D. ; Bychikhin, S. ; Heer, M. ; Mamanee, W. ; Gornik, E. Application of transient interferometric mapping method for ESD and latch-up analysisArtikel Article2011
5Rhayem, J ; Van der Voorde, L ; Wieers, A ; Heer, Michael ; Pogany, Dionyz Wear out analysis in vertical DMOS under repetitive short circuit testingPräsentation Presentation2011
6Pogany, Dionyz ; Bychikhin, Sergey ; Heer, Michael ; Mamanee, Wasinee ; Gornik, Erich Application of transient interferometric mapping method for ESD and latch-up analysisPräsentation Presentation2011
7Haberfehlner, Georg ; Bychikhin, Sergey ; Dubec, Victor ; Heer, Michael ; Podgaynaya, A ; Pfost, M ; Stecher, Matthias ; Gornik, Erich ; Pogany, Dionyz Thermal imaging of smart power DMOS transistors in the thermally unstable regime using a compact transient interferometric mapping systemPräsentation Presentation2009
8Pogany, Dionyz ; Bychikhin, Sergey ; Heer, Michael ; Mamanee, Wasinee ; Dubec, Victor ; Gornik, Erich ; Johnsson, David ; Domanski, Krzysztof ; Esmark, Kai ; Stadler, Wolfgang ; Gossner, Harald ; Stecher, Matthias Application of transient interferometric mapping (TIM) technique for analysis of ns time scale thermal and free carrier dynamics in ESD protection devicesPräsentation Presentation2009
9Heer, Michael ; Domanski, Krzysztof ; Esmark, Kai ; Glaser, Ulrich ; Pogany, Dionyz ; Gornik, Erich ; Stadler, Wolfgang Transient interferometric mapping of carrier plasma during external transient latch-up phenomenian latch-up test structures and I /O cells processed in CMOS technologyArtikel Article2009
10Haberfehlner, Georg ; Bychikhin, Sergey ; Dubec, Victor ; Heer, Michael ; Podgaynaya, A ; Stecher, Matthias ; Gornik, Erich ; Pogany, Dionyz Thermal imaging of smart power DMOS transistors in the thermally unstable regime using a compact transient interferometric mapping systemArtikel Article2009
11Heer, Michael ; Pogany, Dionyz ; Street, M. ; Smith, I. ; Riedlberger, F. ; Bonfert, D. ; Gieser, H. Transient latch-up analysis of power control device with combined light emission and backside transient interferometric mapping methodsKonferenzbeitrag Inproceedings2008
12Heer, Michael ; Grombach, P ; Heid, A ; Pogany, Dionyz Hot spot analysis during thermal shutdown of SOI BCDMOS half bridge driver for automotive applicationsPräsentation Presentation2008
13Heer, M. ; Grombach, P. ; Heid, A. ; Pogany, D. Hot spot analysis during thermal shutdown of SOI BCDMOS half bridge driver for automotive applicationsArtikel Article2008
14Heer, Michael ; Bychikhin, Sergey ; Mamanee, Wasinee ; Pogany, Dionyz ; Heid, A ; Grombach, P ; Klaussner, M ; Soppa, W. ; Ramler, B Experimental and numerical analysis of current flow homogeneity in low voltage SOI multi-finger gg-NMOS and NPN ESD protection devicesArtikel Article2007
15Heer, Michael ; Bychikhin, Sergey ; Mamanee, Wasinee ; Pogany, Dionyz ; Heid, A ; Grambach, P ; Klaussner, M ; Soppa, W. ; Ramler, B Experimental and numerical analysis of current flow homogeneity in low voltage SOI multi-finger gg-NMOS and NPN ESD protection devicesPräsentation Presentation2007
16Domanski, Krzysztof ; Heer, Michael ; Esmark, Kai ; Pogany, Dionyz ; Stadler, Wolfgang ; Gornik, Erich External (transient) latchup phenomenon investigated by optical mapping (TIM) techniqueKonferenzbeitrag Inproceedings2007
17Heer, Michael ; Dubec, Victor ; Bychikhin, Sergey ; Pogany, Dionyz ; Gornik, Erich ; Frank, M ; Konrad, A ; Schulz, J Analysis of triggering behaviour of high voltage CMOS LDMOS clamps and SCRs during ESD induced latch-upArtikel Article2006
18Heer, Michael ; Bychikhin, Sergey ; Dubec, Victor ; Pogany, Dionyz ; Gornik, Erich ; Zullino, L. ; Andreini, A. ; Meneghesso, Gaudenzio Analysis of triggering behavior of low voltage BCD single and multi-finger gc-NMOS ESD protection devicesKonferenzbeitrag Inproceedings2006
19Heer, Michael ; Dubec, Victor ; Bychikhin, Sergey ; Pogany, Dionyz ; Gornik, Erich ; Frank, M ; Konrad, A ; Schulz, J Analysis of triggering behaviour of high voltage CMOS LDMOS clamps and SCRs during ESD induced latch-upPräsentation Presentation2006
20Heer, Michael ; Dubec, Victor ; Blaho, M. ; Bychikhin, Sergey ; Pogany, Dionyz ; Gornik, Erich ; Denison, Marie ; Stecher, Matthias ; Groos, Gerhard Automated setup for thermal imaging and electrical degradation study of power DMOS devicesArtikel Article2005