Name Card

Full name Familienname, Vorname
Bury, Erik
 

Own Publications Eigene Publikationen

Results 1-5 of 5 (Search time: 0.002 seconds).

PreviewAuthor(s)TitleTypeIssue Date
1Makarov, Alexander ; Roussel, Philippe ; Bury, Erik ; Vandemaele, Michiel ; Spessot, Alessio ; Linten, Dimitri ; Kaczer, Ben ; Tyaginov, Stanislav Correlated Time-0 and Hot-Carrier Stress Induced FinFET Parameter Variabilities: Modeling ApproachArtikel Article 2020
2Makarov, Alexander ; Roussel, Philippe ; Bury, Erik ; Vandemaele, Michiel ; Spessot, Alessio ; Linten, Dimitri ; Kaczer, Ben ; Tyaginov, Stanislav On Correlation between Hot-Carrier Stress Induced Device Parameter Degradation and Time-Zero VariabilityKonferenzbeitrag Inproceedings 2019
3Makarov, Alexander ; Kaczer, Ben ; Chasin, Adrian ; Vandemaele, Michiel ; Bury, Erik ; Jech, Markus ; Grill, Alexander ; Hellings, Geert ; El-Sayed, Al-Moatasem ; Grasser, Tibor ; Linten, Dimitri ; Tyaginov, Stanislav Bi-Modal Variability of nFinFET Characteristics During Hot-Carrier Stress: A Modeling ApproachArtikel Article 2019
4Vandemaele, Michiel ; Kaczer, Ben ; Tyaginov, Stanislav ; Stanojevic, Zlatan ; Makarov, Alexander ; Chasin, Adrian ; Bury, Erik ; Mertens, Hans ; Linten, Dimitri ; Groeseneken, Guido Full ($V_{\mathrm{g}},\ V_{\mathrm{d}}$) Bias Space Modeling of Hot-Carrier Degradation in Nanowire FETsKonferenzbeitrag Inproceedings2019
5Franco, Jacopo ; Kaczer, Ben ; Roussel, Philippe J. ; Bury, Erik ; Mertens, Hans ; Ritzenthaler, Romain ; Grasser, Tibor ; Horiguchi, Naoto ; Thean, Aaron ; Groeseneken, Guido NBTI in Si<inf>0.55</inf>Ge<inf>0.45</inf> cladding p-FinFETs: Porting the superior reliability from planar to 3D architecturesKonferenzbeitrag Inproceedings2015