<div class="csl-bib-body">
<div class="csl-entry">Putra, R. V. W., Hanif, M. A., & Shafique, M. (2022). SoftSNN: Low-Cost Fault Tolerance for Spiking Neural Network Accelerators under Soft Errors. In <i>DAC ’22: Proceedings of the 59th ACM/IEEE Design Automation Conference</i> (pp. 151–156). https://doi.org/10.1145/3489517.3530657</div>
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dc.identifier.uri
http://hdl.handle.net/20.500.12708/142203
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dc.description.abstract
Specialized hardware accelerators have been designed and employed to maximize the performance efficiency of Spiking Neural Networks (SNNs). However, such accelerators are vulnerable to transient faults (i.e., soft errors), which occur due to high-energy particle strikes, and manifest as bit flips at the hardware layer. These errors can change the weight values and neuron operations in the compute engine of SNN accelerators, thereby leading to incorrect outputs and accuracy degradation. However, the impact of soft errors in the compute engine and the respective mitigation techniques have not been thoroughly studied yet for SNNs. A potential solution is employing redundant executions (re-execution) for ensuring correct outputs, but it leads to huge latency and energy overheads. Toward this, we propose SoftSNN, a novel methodology to mitigate soft errors in the weight registers (synapses) and neurons of SNN accelerators without re-execution, thereby maintaining the accuracy with low latency and energy overheads. Our SoftSNN methodology employs the following key steps: (1) analyzing the SNN characteristics under soft errors to identify faulty weights and neuron operations, which are required for recognizing faulty SNN behavior; (2) a Bound-and-Protect technique that leverages this analysis to improve the SNN fault tolerance by bounding the weight values and protecting the neurons from faulty operations; and (3) devising lightweight hardware enhancements for the neural hardware accelerator to efficiently support the proposed technique. The experimental results show that, for a 900-neuron network with even a high fault rate, our SoftSNN maintains the accuracy degradation below 3%, while reducing latency and energy by up to 3x and 2.3x respectively, as compared to the re-execution technique.
en
dc.language.iso
en
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dc.subject
spiking neural networks
en
dc.subject
hardware accelerators
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dc.subject
fault tolerance
en
dc.title
SoftSNN: Low-Cost Fault Tolerance for Spiking Neural Network Accelerators under Soft Errors
en
dc.type
Inproceedings
en
dc.type
Konferenzbeitrag
de
dc.contributor.affiliation
New York Univeersity Abu Dhabi (NYUAD), United Arab Emirates
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dc.relation.isbn
9781450391429
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dc.description.startpage
151
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dc.description.endpage
156
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dc.type.category
Full-Paper Contribution
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tuw.booktitle
DAC '22: Proceedings of the 59th ACM/IEEE Design Automation Conference
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tuw.peerreviewed
true
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tuw.researchTopic.id
I2
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tuw.researchTopic.name
Computer Engineering and Software-Intensive Systems
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tuw.researchTopic.value
100
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tuw.publication.orgunit
E191-02 - Forschungsbereich Embedded Computing Systems