<div class="csl-bib-body">
<div class="csl-entry">Fuchs, G., & Steininger, A. (2011). VLSI Implementation of a Distributed Algorithm for Fault-Tolerant Clock Generation. <i>Journal of Electrical and Computer Engineering</i>, <i>2011</i>. https://doi.org/10.1155/2011/936712</div>
</div>
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dc.identifier.issn
2090-0147
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dc.identifier.uri
http://hdl.handle.net/20.500.12708/163153
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dc.description.abstract
We present a novel approach for the on-chip generation of a fault-tolerant clock. Our method is based on the
hardware implementation of a tick synchronization algorithm from the distributed systems community. We discuss
the selection of an appropriate algorithm, present the refinement steps necessary to facilitate its efficient mapping
to hardware, and elaborate on the key challenges we had to overcome in our actual ASIC implementation. Our
measurement results confirm that the approach is indeed capable of creating a globally synchronized clock in a
distributed fashion that is tolerant to a (configurable) number of arbitrary faults. This property facilitates eliminating
the clock as a single point of failure. Our solution is based on purely asynchronous design, obviating the need for
crystal oscillators. It is capable of adapting to parameter variations as well as changes in temperature and power
supply-properties that are considered highly desirable for future technology nodes.
en
dc.description.sponsorship
FFG - Österr. Forschungsförderungs- gesellschaft mbH
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dc.language.iso
en
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dc.publisher
Hindawi
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dc.relation.ispartof
Journal of Electrical and Computer Engineering
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dc.subject
Electrical and Electronic Engineering
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dc.subject
General Computer Science
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dc.subject
Signal Processing
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dc.title
VLSI Implementation of a Distributed Algorithm for Fault-Tolerant Clock Generation
en
dc.type
Artikel
de
dc.type
Article
en
dc.type.category
Original Research Article
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tuw.container.volume
2011
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tuw.journal.peerreviewed
true
-
tuw.peerreviewed
true
-
tuw.project.title
Distributed Algorithms for Robust Tick Synchronization
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tuw.researchTopic.id
I2
-
tuw.researchTopic.name
Computer Engineering and Software-Intensive Systems
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tuw.researchTopic.value
100
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dcterms.isPartOf.title
Journal of Electrical and Computer Engineering
-
tuw.publication.orgunit
E191-02 - Forschungsbereich Embedded Computing Systems
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tuw.publisher.doi
10.1155/2011/936712
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dc.identifier.eissn
2090-0155
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dc.description.numberOfPages
23
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tuw.author.orcid
0000-0002-3847-1647
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wb.sciencebranch
Mathematik, Informatik
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wb.sciencebranch
Informatik
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wb.sciencebranch.oefos
11
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wb.sciencebranch.oefos
1020
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wb.facultyfocus
Computer Engineering (CE)
de
wb.facultyfocus
Computer Engineering (CE)
en
wb.facultyfocus.faculty
E180
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item.languageiso639-1
en
-
item.openairetype
research article
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item.grantfulltext
none
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item.fulltext
no Fulltext
-
item.cerifentitytype
Publications
-
item.openairecristype
http://purl.org/coar/resource_type/c_2df8fbb1
-
crisitem.author.dept
E182 - Institut für Technische Informatik
-
crisitem.author.dept
E191-02 - Forschungsbereich Embedded Computing Systems
-
crisitem.author.orcid
0000-0002-3847-1647
-
crisitem.author.parentorg
E180 - Fakultät für Informatik
-
crisitem.author.parentorg
E191 - Institut für Computer Engineering
-
crisitem.project.funder
FFG - Österr. Forschungsförderungs- gesellschaft mbH