Modulares Echtzeit-Testsystem für Layer 2 Ethernet

Abstract

TTTech develops real-time networking platforms, including the design of application-specific integrated circuits. The verification of such devices requires the generation of malformed or non-standard conform network frames as stimuli to cover corner cases. General purpose operating systems and off-the-shelf network interface cards limit the range of possible frame formats. E.g. it is not possible to send a frame with a wrong checksum or to define an interframe gap with nanosecond accuracy. The important subset of tests requiring such stimuli is therefore carried out in simulation. However, this approach can be restrictive because it requires high execution time, high computational complexity and may not be feasible for long-lasting test scenarios. This thesis project aims to solve the problem by developing a Field Programmable Gate Array (FPGA) based testing device expanding the testable system space and speeding up test runs. The following topics are solved and discussed: 1. Free configuration of Ethernet frame fields as well as arbitrary interframe gaps 2. Modular architecture, i.e. the design supports a flexible number of Ethernet switchboards to allow a configurable number of ports 3. Packet sniffing capabilities 4. Time synchronization between Ethernet switch boards to compensate the clock drift of the monolithic devices and enable adequate time stamps 5. Design, testing and documentation of hardware as well as host software6. Ethernet switch board selection and implementation. The developed device prototype, called Tester, supports up to 49 ports that can operate simultaneously in either 10, 100 or 1000 MBit/s speeds with an inter-board accuracy of 90 nanoseconds. It can be used from a single linux based computer via an Ethernet port without strict performance requirements. A market survey shows that the implemented feature set is unique. This thesis project was conducted at TTTech Computertechnik AG in Vienna.