<div class="csl-bib-body">
<div class="csl-entry">Navarro Quijada, J., Baldauf, T., Rai, S., Heinzig, A., Kumar, A., Weber, W. M., Mikolajick, T., & Trommer, J. (2022). Germanium Nanowire Reconfigurable Transistor Model for Predictive Technology Evaluation. <i>IEEE Transactions on Nanotechnology</i>, <i>21</i>, 728–736. https://doi.org/10.1109/TNANO.2022.3221836</div>
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dc.identifier.issn
1536-125X
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dc.identifier.uri
http://hdl.handle.net/20.500.12708/187455
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dc.description.abstract
Reconfigurable Field Effect Transistors can be electrostatically programmed to p-or n-type behavior. This device level reconfigurability is a promising way to enhance the functionality of digital circuits. Here, we present a Verilog-A based Germanium nanowire table model for the analysis of dynamically reconfigurable logic gates. The model is based on TCAD simulations of a nanowire transistor design with feature sizes compatible to a 14nm FinFET process. To showcase that our model enables digital circuit design for reconfigurable operation, performance and power consumption estimations for basic static as well as reconfigurable logic cells are given. Performance improvements over Silicon nanowire based designs are predicted, making Germanium RFETs a promising candidate for future co-integration into standard CMOS processes.
en
dc.language.iso
en
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dc.publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
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dc.relation.ispartof
IEEE Transactions on Nanotechnology
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dc.subject
Functionally enhanced logic gates
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dc.subject
germanium
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dc.subject
MIGRFET
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dc.subject
reconfigurable transistor
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dc.subject
RFET
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dc.subject
TIGFET
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dc.title
Germanium Nanowire Reconfigurable Transistor Model for Predictive Technology Evaluation