<div class="csl-bib-body">
<div class="csl-entry">Sverdlov, V., Bendra, M., Goes, W., Fiorentini, S., Garcia-Barrientos, A., & Selberherr, S. (2023). Multi-level Operation in Ultra-scaled MRAM. In <i>2023 IEEE Latin American Electron Devices Conference (LAEDC) Proceedings</i>. 2023 IEEE Latin American Electron Devices Conference (LAEDC), Puebla, Mexico. https://doi.org/10.1109/LAEDC58183.2023.10209117</div>
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dc.identifier.uri
http://hdl.handle.net/20.500.12708/190050
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dc.description.abstract
Magnetoresistive random access memory (MRAM) prototypes demonstrate fast operation and are suitable for the last level caches. MRAM possesses high endurance, long retention, and requires less masks for fabrication than its competitor flash memory. MRAM is nonvolatile and scalable. Strong perpendicular magnetic anisotropy in most advanced single-digit nanoscale footprint devices is enhanced by elongating the magnetic layers. To facilitate the switching and to increase the interface-induced magnetic anisotropy even further, the free magnetic layers are made of several elongated pieces separated by tunnel barriers with multiple interfaces. To properly model such devices, accurate evaluation of the spin-transfer torques is required. The interfacial and bulk-torques are not independent, and the use of a spin-charge transport approach coupled to the magnetization dynamics allowing to treat the torques on equal footing in magnetic tunnel junctions with elongated layers becomes mandatory. By employing this advanced modeling approach a multi-level memory operation in an ultra-scaled MRAM cell with a composite free layer is demonstrated.
en
dc.description.sponsorship
Christian Doppler Forschungsgesells
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dc.language.iso
en
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dc.subject
Spin and charge drift-diffusion
en
dc.subject
spin-transfer torque
en
dc.subject
magnetic tunnel junctions
en
dc.subject
STT-MRAM
en
dc.subject
composite free layer
en
dc.subject
shape-induced magnetic anisotropy
en
dc.subject
double-spin MTJ
en
dc.title
Multi-level Operation in Ultra-scaled MRAM
en
dc.type
Inproceedings
en
dc.type
Konferenzbeitrag
de
dc.relation.isbn
979-8-3503-1190-7
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dc.relation.doi
10.1109/LAEDC58183.2023
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dc.relation.grantno
P300686
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dc.type.category
Full-Paper Contribution
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tuw.booktitle
2023 IEEE Latin American Electron Devices Conference (LAEDC) Proceedings
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tuw.project.title
CD-Labor für Nichtflüchtige magnetisch-resistive Speicher und Logik
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tuw.researchTopic.id
Q4
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tuw.researchTopic.id
C6
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tuw.researchTopic.name
Nanoelectronics
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tuw.researchTopic.name
Modeling and Simulation
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tuw.researchTopic.value
50
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tuw.researchTopic.value
50
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tuw.publication.orgunit
E360 - Institut für Mikroelektronik
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tuw.publisher.doi
10.1109/LAEDC58183.2023.10209117
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dc.description.numberOfPages
4
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tuw.author.orcid
0000-0002-5583-6177
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tuw.event.name
2023 IEEE Latin American Electron Devices Conference (LAEDC)
en
tuw.event.startdate
03-07-2023
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tuw.event.enddate
05-07-2023
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tuw.event.online
On Site
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tuw.event.type
Event for scientific audience
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tuw.event.place
Puebla
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tuw.event.country
MX
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tuw.event.presenter
Sverdlov, Viktor
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wb.sciencebranch
Elektrotechnik, Elektronik, Informationstechnik
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wb.sciencebranch.oefos
2020
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wb.sciencebranch.value
100
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item.fulltext
no Fulltext
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item.openairecristype
http://purl.org/coar/resource_type/c_5794
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item.cerifentitytype
Publications
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item.openairetype
conference paper
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item.grantfulltext
restricted
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item.languageiso639-1
en
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crisitem.author.dept
E360-01 - Forschungsbereich Mikroelektronik
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crisitem.author.dept
E360-01 - Forschungsbereich Mikroelektronik
-
crisitem.author.dept
E360-01 - Forschungsbereich Mikroelektronik
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crisitem.author.dept
E360 - Institut für Mikroelektronik
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crisitem.author.orcid
0000-0002-5583-6177
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crisitem.author.parentorg
E360 - Institut für Mikroelektronik
-
crisitem.author.parentorg
E360 - Institut für Mikroelektronik
-
crisitem.author.parentorg
E360 - Institut für Mikroelektronik
-
crisitem.author.parentorg
E350 - Fakultät für Elektrotechnik und Informationstechnik