<div class="csl-bib-body">
<div class="csl-entry">Marchisio, A., Dura, D., Capra, M., Martina, M., Masera, G., & Shafique, M. (2023). SwiftTron: An Efficient Hardware Accelerator for Quantized Transformers. In <i>2023 International Joint Conference on Neural Networks (IJCNN)</i>. 2023 International Joint Conference on Neural Networks (IJCNN), Gold Coast, Australia. IEEE. https://doi.org/10.1109/IJCNN54540.2023.10191521</div>
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dc.identifier.uri
http://hdl.handle.net/20.500.12708/192700
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dc.description.abstract
Transformers' compute- intensive operations pose enormous challenges for their deployment in resource- constrained EdgeAI / tiny ML devices. As an established neural network compression technique, quantization reduces the hardware computational and memory resources. In particular, fixed-point quantization is desirable to ease the computations using lightweight blocks, like adders and multipliers, of the underlying hardware. However, deploying fully-quantized Transformers on existing general-purpose hardware, generic AI accelerators, or specialized architectures for Transformers with floating-point units might be infeasible and/or inefficient. Towards this, we propose SwiftTron, an efficient specialized hardware accelerator designed for Quantized Transformers. SwiftTron supports the execution of different types of Transformers' operations (like Attention, Softmax, GELU, and Layer Normalization) and accounts for diverse scaling factors to perform correct computations. We synthesize the complete SwiftTron architecture in a 65 nm CMOS technology with the ASIC design flow. Our Accelerator executes the RoBERTa-base model in 1.83 ns, while consuming 33.64 mW power, and occupying an area of 273 mm 2• To ease the reproducibility, the RTL of our SwiftTron architecture is released at https://github.com/albertomarchisio/SwiftTron.
en
dc.language.iso
en
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dc.subject
ASIC
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dc.subject
Attention
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dc.subject
GELU
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dc.subject
Hardware Architecture
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dc.subject
Layer Normalization
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dc.subject
Machine Learning
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dc.subject
Quantization
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dc.subject
Softmax
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dc.subject
Transformers
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dc.title
SwiftTron: An Efficient Hardware Accelerator for Quantized Transformers
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dc.type
Inproceedings
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dc.type
Konferenzbeitrag
de
dc.relation.publication
2023 International Joint Conference on Neural Networks (IJCNN)
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dc.contributor.affiliation
Polytechnic University of Turin, Italy
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dc.contributor.affiliation
Polytechnic University of Turin, Italy
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dc.contributor.affiliation
Polytechnic University of Turin, Italy
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dc.contributor.affiliation
Polytechnic University of Turin, Italy
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dc.relation.isbn
978-1-6654-8867-9
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dc.relation.doi
10.1109/IJCNN54540.2023
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dc.relation.issn
2161-4393
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dc.type.category
Full-Paper Contribution
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dc.relation.eissn
2161-4407
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tuw.booktitle
2023 International Joint Conference on Neural Networks (IJCNN)
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tuw.relation.publisher
IEEE
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tuw.researchTopic.id
I2
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tuw.researchTopic.name
Computer Engineering and Software-Intensive Systems
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tuw.researchTopic.value
100
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tuw.publication.orgunit
E191-02 - Forschungsbereich Embedded Computing Systems
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tuw.publisher.doi
10.1109/IJCNN54540.2023.10191521
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dc.description.numberOfPages
9
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tuw.author.orcid
0000-0002-0689-4776
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tuw.author.orcid
0000-0002-3069-0319
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tuw.event.name
2023 International Joint Conference on Neural Networks (IJCNN)
en
tuw.event.startdate
18-06-2023
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tuw.event.enddate
23-06-2023
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tuw.event.online
On Site
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tuw.event.type
Event for scientific audience
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tuw.event.place
Gold Coast
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tuw.event.country
AU
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tuw.event.presenter
Marchisio, Alberto
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wb.sciencebranch
Informatik
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wb.sciencebranch.oefos
1020
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wb.sciencebranch.value
100
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item.languageiso639-1
en
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item.grantfulltext
restricted
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item.cerifentitytype
Publications
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item.openairetype
conference paper
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item.openairecristype
http://purl.org/coar/resource_type/c_5794
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item.fulltext
no Fulltext
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crisitem.author.dept
E191-02 - Forschungsbereich Embedded Computing Systems
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crisitem.author.dept
Polytechnic University of Turin
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crisitem.author.dept
Polytechnic University of Turin
-
crisitem.author.dept
Polytechnic University of Turin
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crisitem.author.dept
E191-02 - Forschungsbereich Embedded Computing Systems