Al-Si-Ge multi-heterojunction reconfigurable field-effect transistors for circuit applications

Abstract

Conventional integrated digital and analog circuits are based on CMOS technology. In order to obtain n- and p-type transistors doping is a critical and technologically complex process. Each circuit exhibits its own specific design, thus securing the circuit design in order to prevent reverse engineering strategies can be challenging. An approach to overcome these drawbacks is to use doping-free run-time switchable reconfigurable field effect transistors (RFETs) instead of conventional static n- and p-type transistors. Such adaptive transistors enable the imitation of both types with one single device, thus potentially enhance hardware security, as consequently also with equal circuit designs, more than one circuit implementation can be realized depending on the applied gating voltages. In this work, Ge RFETs and thereof based circuits were investigated. The RFETs are fabricated in a top-down approach on a Ge on SOI platform, resulting in Al-Si-Ge-Si-Al heterojunction nanosheets with an ultra-thin Si interlayer between the Al and the Ge that results in mid-gap Fermi-level pinning. Transfer and output characteristics of the RFETs are performed to characterize the n- and p-type operation of the transistors with respect to on- and off-currents. Thereof, a significantly enhanced current symmetry of the n- and pmode over common Ge RFETs could be demonstrated. Moreover, investigating the circuit structures it shows that with only one circuit design, various different circuit applications can be implemented by applying various voltage levels and connecting external load resistors where applicable. More precisely a common source circuit, a common drain circuit, a cascode circuit, a differential amplifier and a complementary inverter are achieved with the same RFET based circuit design. Furthermore, an RFET-based current mirror is investigated, which can compensate asymmetries that may occur during fabrication and lead to deviations of the desired load or output current by applying dedicated but different gate voltages instead of tuning the width/length ratio of the individual transistors. This demonstrates the potential of RFET based circuits for future analog and digital circuit design.