<div class="csl-bib-body">
<div class="csl-entry">Fuchsberger, A., Wind, L., Nazzari, D., Dobler, A., Aberl, J., Prado Navarrete, E., Brehm, M., Vogl, L., Schweizer, P., Lellig, S., Maeder, X., Sistani, M., & Weber, W. M. (2024). A reconfigurable Ge transistor functionally diversified by negative differential resistance. <i>IEEE Journal of the Electron Devices Society</i>, <i>12</i>, 541–547. https://doi.org/10.34726/6979</div>
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dc.identifier.issn
2168-6734
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dc.identifier.uri
http://hdl.handle.net/20.500.12708/203468
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dc.identifier.uri
https://doi.org/10.34726/6979
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dc.description.abstract
A promising approach to advance electronics beyond static operations is to enhance state-ofthe-art systems by the functional diversification of transistors. Here, we experimentally demonstrate that an ultra-thin Ge channel implemented on a Si on insulator platform enables run-time switchable symmetric pand n-type field-effect transistor operability as well as the prominent feature of distinct room-temperature negative differential resistance. Temperature dependent bias spectroscopy is utilized to map electronic transport in these so called negative differential resistance mode reconfigurable transistors. Thereof, a profound understanding of the involved transport physics and electrostatic gating mechanisms is obtained and evaluated. Further, we show that a multi-gate negative differential resistance reconfigurable transistor can effectively replace a cascode of negative differential resistance devices, contributing to a smaller area footprint, and reduced latency of critical paths. Notably, the experimentally obtained multi-heterojunction transistors constitute the first chip-scale platform that combines efficient polarity control as well as sizeand energy-efficient room-temperature negative differential resistance, providing an inherent component of emerging neuromorphic computing.