Low-Power 50 Gbps Driver Circuit for High-Capacitance Electro-Absorption Modulators in 130nm SiGe BiCMOS Technology

Abstract

This paper presents an electro-absorption modulator driver circuit implemented in 130nm SiGe BiCMOS technology for application in data centers. By avoiding complex active circuit structures and utilizing transmission lines to enhance input matching and bandwidth, the design achieves a low power consumption of 130 m W. The circuit, optimized for a highly capacitive load of 200 fF, demonstrates a speed of 50 Gbps under time-domain eye diagram simulations and a 1.5 V output swing. The P AM4 eye diagram further confirms its reliable performance for high-order modulation, which is crucial for ultra-high-speed applications like in data centers.