<div class="csl-bib-body">
<div class="csl-entry">Bestelink, E., Galderisi, G., Golec, P., Han, Y., Iniguez, B., Kloes, A., Knoch, J., Matsui, H., Mikolajick, T., Niang, K. M., Richstein, B., Schwarz, M., Sistani, M., Sporea, R. A., Trommer, J., Weber, W. M., Zhao, Q.-T., & Calvet, L. E. (2024). Roadmap for Schottky barrier transistors. <i>NANO FUTURES</i>, <i>8</i>(4), Article 042001. https://doi.org/10.1088/2399-1984/ad92d1</div>
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dc.identifier.issn
2399-1984
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dc.identifier.uri
http://hdl.handle.net/20.500.12708/208755
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dc.description.abstract
In this roadmap we consider the status and challenges of technologies that use the properties of a rectifying metal-semiconductor interface, known as a Schottky barrier (SB), as an asset for device functionality. We discuss source gated transistors, which allow for excellent electronic characteristics for low power, low frequency environmentally friendly circuits. We also consider reconfigurable field effect transistors. In such devices, two or more independent gate electrodes can be used to program different functionalities at the device level, enabling ultra-secure embedded devices. Both types of transistors can be used for neuromorphic systems, notably by combining them with ferroelectric SB transistors which enable a large number of analog states. At cryogenic temperatures SB transistors can advantageously serve for the control electronics in quantum computing devices. If the source/drain of the metallic contact becomes superconducting, Josephson junctions with a tunable phase can be realized for scalable quantum computing applications. Developing applications using SB devices requires physics-based and compact models that can be used for circuit simulations, which are also discussed. The roadmap reveals that the main challenges for these technologies are improving processing, access to industrial technologies and modeling tools for circuit simulations.
en
dc.language.iso
en
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dc.publisher
IOP PUBLISHING LTD
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dc.relation.ispartof
NANO FUTURES
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dc.rights.uri
http://creativecommons.org/licenses/by/4.0/
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dc.subject
Schottky Barrier
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dc.subject
transisors
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dc.subject
device
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dc.subject
circuits
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dc.subject
semiconductor
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dc.title
Roadmap for Schottky barrier transistors
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dc.type
Article
en
dc.type
Artikel
de
dc.rights.license
Creative Commons Namensnennung 4.0 International
de
dc.rights.license
Creative Commons Attribution 4.0 International
en
dc.contributor.affiliation
University of Surrey, United Kingdom of Great Britain and Northern Ireland (the)
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dc.contributor.affiliation
NaMLab (Germany), Germany
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dc.contributor.affiliation
University of Surrey, United Kingdom of Great Britain and Northern Ireland (the)
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dc.contributor.affiliation
Forschungszentrum Jülich, Germany
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dc.contributor.affiliation
Universidad Rovira i Virgili, Spain
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dc.contributor.affiliation
Technische Hochschule Mittelhessen, Germany
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dc.contributor.affiliation
RWTH Aachen University, Germany
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dc.contributor.affiliation
University of Surrey, United Kingdom of Great Britain and Northern Ireland (the)