<div class="csl-bib-body">
<div class="csl-entry">Kukovec, J. (2024). <i>SMT-driven techniques for verifying distributed systems</i> [Dissertation, Technische Universität Wien]. reposiTUm. https://doi.org/10.34726/hss.2025.128661</div>
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dc.identifier.uri
https://doi.org/10.34726/hss.2025.128661
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dc.identifier.uri
http://hdl.handle.net/20.500.12708/209338
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dc.description.abstract
Distributed systems, that is, networks of real or virtual components that collaborate in solving an algorithmic task underpin many of our modern technologies. The correctness of these systems is often critical; unpredictable system behavior can, in the worst cases, result in major financial loss, confidential data breaches, or even physical harm. Because of this, formal verification of these systems has been an active area of research for many decades. With the advent of cloud services and cryptocurrencies, there has also been an increase in demand, for newer, better, and more robust verification techniques. The primary contribution of this thesis is a set of techniques for designing a symbolic model checker for TLA+, with which one can verify properties of distributed algorithms. We focus particularly on specifications of distributed algorithms, as the use of TLA+ has recently been seeing rapid growth in the development of distributed systems. Specifically, we: 1. Formalize the notion of a symbolic transition, an equivalence class of transitions in the state-space defined by an algorithm specification. This is both a necessary prerequisite for symbolic verification, as well as a finite abstraction, reducing a potentially infinite number of real transitions, to a finite family of symbolic ones. 2. Define an encoding of constructs in the kernel of TLA+ to first-order logic, suitable for SMT solvers. This allows us to symbolically encode a bounded execution of the algorithm specification, and the properties we wish to verify, as an SMT formula, which can be passed to an off-the-shelf SMT solver. 3. Design a type system for TLA+, as well as a technique for automatic type inference. Types are both necessary, to bridge the gap between conventionally untyped TLA+ and typed SMT, and helpful, because algorithm designers are typically familiar with types and their uses in programming languages, and many errors, especially in the incremental design of an algorithm, can already be caught by type analysis.
en
dc.language
English
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dc.language.iso
en
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dc.rights.uri
http://rightsstatements.org/vocab/InC/1.0/
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dc.subject
TLA+
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dc.subject
SMT
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dc.subject
formal verification
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dc.subject
system specification
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dc.subject
model checking
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dc.subject
bounded model checking
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dc.title
SMT-driven techniques for verifying distributed systems
en
dc.type
Thesis
en
dc.type
Hochschulschrift
de
dc.rights.license
In Copyright
en
dc.rights.license
Urheberrechtsschutz
de
dc.identifier.doi
10.34726/hss.2025.128661
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dc.contributor.affiliation
TU Wien, Österreich
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dc.rights.holder
Jure Kukovec
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dc.publisher.place
Wien
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tuw.version
vor
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tuw.thesisinformation
Technische Universität Wien
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dc.contributor.assistant
Widder, Josef
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tuw.publication.orgunit
E192 - Institut für Logic and Computation
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dc.type.qualificationlevel
Doctoral
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dc.identifier.libraryid
AC17414953
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dc.description.numberOfPages
168
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dc.thesistype
Dissertation
de
dc.thesistype
Dissertation
en
dc.rights.identifier
In Copyright
en
dc.rights.identifier
Urheberrechtsschutz
de
tuw.advisor.staffStatus
staff
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tuw.assistant.staffStatus
staff
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item.languageiso639-1
en
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item.grantfulltext
open
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item.openairetype
doctoral thesis
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item.openaccessfulltext
Open Access
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item.mimetype
application/pdf
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item.openairecristype
http://purl.org/coar/resource_type/c_db06
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item.cerifentitytype
Publications
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item.fulltext
with Fulltext
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crisitem.author.dept
E192-04 - Forschungsbereich Formal Methods in Systems Engineering