<div class="csl-bib-body">
<div class="csl-entry">Rath, J., Eisenhofer, C., Kaufmann, D., Bjørner, N., & Kovacs, L. (2024, October 14). <i>PolySAT: Word-level Bit-vector Reasoning in Z3</i> [Conference Presentation]. VSTTE 2024, Prague, Czechia. http://hdl.handle.net/20.500.12708/211021</div>
</div>
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dc.identifier.uri
http://hdl.handle.net/20.500.12708/211021
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dc.description.abstract
PolySAT is a word-level decision procedure supporting bit-precise SMT reasoning over polynomial arithmetic with large bit-vector operations. Addressing challenges of verified software, PolySAT integrates the theoretical development of SMT-based calculi with a proof of concept implementation and empirical evaluation. The PolySAT calculus extends conflict-driven clause learning modulo theories with two key components: (i) a bit-vector plugin to the equality graph, and (ii) a theory solver for bit-vector arithmetic with non-linear polynomials. PolySAT implements dedicated procedures to extract bit-vector intervals from polynomial inequalities. For conflict analysis and resolution, PolySAT comes with on-demand lemma generation over non-linear bit-vector arithmetic. PolySAT is integrated into the SMT solver Z3 and has applications in model checking and smart contract verification where bit-blasting
techniques on multipliers/divisions do not scale.
en
dc.description.sponsorship
European Commission
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dc.description.sponsorship
FWF - Österr. Wissenschaftsfonds
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dc.language.iso
en
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dc.subject
SMT Solving
en
dc.subject
Bit-vector Theory
en
dc.subject
Word-level Reasoning
en
dc.subject
Software Verification
en
dc.title
PolySAT: Word-level Bit-vector Reasoning in Z3
en
dc.type
Presentation
en
dc.type
Vortrag
de
dc.contributor.affiliation
Microsoft Research New England (United States)
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dc.relation.grantno
ERC Consolidator Grant 2020
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dc.relation.grantno
F 8500
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dc.type.category
Conference Presentation
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tuw.project.title
Automated Reasoning with Theories and Induction for Software Technologies
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tuw.project.title
Semantische und kryptografische Grundlagen von Informationssicherheit und Datenschutz durch modulares Design
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tuw.researchTopic.id
I1
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tuw.researchTopic.name
Logic and Computation
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tuw.researchTopic.value
100
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tuw.publication.orgunit
E192-04 - Forschungsbereich Formal Methods in Systems Engineering
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tuw.publication.orgunit
E056-10 - Fachbereich SecInt-Secure and Intelligent Human-Centric Digital Technologies
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tuw.publication.orgunit
E056-13 - Fachbereich LogiCS
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tuw.publication.orgunit
E056-17 - Fachbereich Trustworthy Autonomous Cyber-Physical Systems
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tuw.author.orcid
0000-0003-0346-6749
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tuw.author.orcid
0000-0003-0339-1580
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tuw.author.orcid
0000-0002-1695-2810
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tuw.author.orcid
0000-0002-8299-2714
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tuw.event.name
VSTTE 2024
en
tuw.event.startdate
14-10-2024
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tuw.event.enddate
15-10-2024
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tuw.event.online
On Site
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tuw.event.type
Event for scientific audience
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tuw.event.place
Prague
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tuw.event.country
CZ
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tuw.event.presenter
Rath, Jakob
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tuw.event.track
Single Track
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wb.sciencebranch
Informatik
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wb.sciencebranch
Mathematik
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wb.sciencebranch.oefos
1020
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wb.sciencebranch.oefos
1010
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wb.sciencebranch.value
80
-
wb.sciencebranch.value
20
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item.openairecristype
http://purl.org/coar/resource_type/c_18cp
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item.cerifentitytype
Publications
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item.languageiso639-1
en
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item.fulltext
no Fulltext
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item.openairetype
conference paper not in proceedings
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item.grantfulltext
none
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crisitem.author.dept
E192-04 - Forschungsbereich Formal Methods in Systems Engineering
-
crisitem.author.dept
E192-04 - Forschungsbereich Formal Methods in Systems Engineering
-
crisitem.author.dept
E192-04 - Forschungsbereich Formal Methods in Systems Engineering
-
crisitem.author.dept
Microsoft Research New England (United States)
-
crisitem.author.dept
E192-04 - Forschungsbereich Formal Methods in Systems Engineering