<div class="csl-bib-body">
<div class="csl-entry">Fazekas, K., Pollitt, F., Fleury, M., & Biere, A. (2024). Incremental Proofs for Bounded Model Checking. In <i>MBMV 2024 : 27. Workshop</i> (pp. 133–143). http://hdl.handle.net/20.500.12708/211103</div>
</div>
-
dc.identifier.uri
http://hdl.handle.net/20.500.12708/211103
-
dc.description.abstract
Bounded model checkers show the validity of a property of a hardware or software system to hold up to a certain bound by solving a sequence of related Boolean satisfiability (SAT) problems. An incremental SAT solver, a tool often used by such model checkers, can exploit similarities between these consecutive SAT problems. By avoiding repeated work incremental solving is much more efficient. To increase the trustworthiness of a model checker, it is however important to provide assurance about the correctness of its underlying solving engine. Though modern SAT solvers are expected to produce an independently verifiable certificate when a formula is unsatisfiable, incremental SAT solving involves multiple formulae under different temporary assumptions. In this paper we propose a new proof format for SAT solvers applicable to incremental use cases and demonstrate the viability of it in the context of bounded hardware model checking.
en
dc.description.sponsorship
FWF - Österr. Wissenschaftsfonds
-
dc.language.iso
en
-
dc.subject
SAT-based BMC
en
dc.subject
Incremental SAT solving
en
dc.subject
Proof Checking
en
dc.title
Incremental Proofs for Bounded Model Checking
en
dc.type
Inproceedings
en
dc.type
Konferenzbeitrag
de
dc.contributor.affiliation
University of Freiburg, Germany
-
dc.contributor.affiliation
University of Freiburg, Germany
-
dc.contributor.affiliation
University of Freiburg, Germany
-
dc.relation.isbn
978-3-8007-6267-5
-
dc.description.startpage
133
-
dc.description.endpage
143
-
dc.relation.grantno
T 1306-N
-
dc.type.category
Full-Paper Contribution
-
tuw.booktitle
MBMV 2024 : 27. Workshop
-
tuw.peerreviewed
true
-
tuw.project.title
Inkrementelles SAT und SMT für skalierbare Verifikation
-
tuw.researchTopic.id
I1
-
tuw.researchTopic.id
I2
-
tuw.researchTopic.id
C5
-
tuw.researchTopic.name
Logic and Computation
-
tuw.researchTopic.name
Computer Engineering and Software-Intensive Systems
-
tuw.researchTopic.name
Computer Science Foundations
-
tuw.researchTopic.value
40
-
tuw.researchTopic.value
40
-
tuw.researchTopic.value
20
-
tuw.publication.orgunit
E192-04 - Forschungsbereich Formal Methods in Systems Engineering
-
dc.description.numberOfPages
11
-
tuw.author.orcid
0000-0002-0497-3059
-
tuw.author.orcid
0009-0001-4337-6919
-
tuw.author.orcid
0000-0002-1705-3083
-
tuw.author.orcid
0000-0001-7170-9242
-
tuw.event.name
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2024)
de
tuw.event.startdate
14-02-2024
-
tuw.event.enddate
15-02-2024
-
tuw.event.online
On Site
-
tuw.event.type
Event for scientific audience
-
tuw.event.place
Kaiserslautern
-
tuw.event.country
DE
-
tuw.event.institution
Rheinland-Pfälzische Technische Universität Kaiserslautern-Landau
-
tuw.event.presenter
Fazekas, Katalin
-
tuw.event.track
Single Track
-
wb.sciencebranch
Informatik
-
wb.sciencebranch
Mathematik
-
wb.sciencebranch.oefos
1020
-
wb.sciencebranch.oefos
1010
-
wb.sciencebranch.value
80
-
wb.sciencebranch.value
20
-
item.openairecristype
http://purl.org/coar/resource_type/c_5794
-
item.openairetype
conference paper
-
item.fulltext
no Fulltext
-
item.languageiso639-1
en
-
item.grantfulltext
none
-
item.cerifentitytype
Publications
-
crisitem.author.dept
E192-04 - Forschungsbereich Formal Methods in Systems Engineering