SPAD Active Quenching/Resetting Circuit in 0.35-μm HV-CMOS Enabling 24V Excess Bias for PDP > 90%

Abstract

Single-Photon Avalanche Diodes (SPADs) require a high excess bias voltage to maximize photon detection probability (PDP) while afterpulsing has to be minimized. This work presents an active quenching and resetting circuit, implemented in a 0.35 μm high-voltage CMOS process, which features a medium-oxide MOSFET that supports an excess bias range of 24V. Post-layout simulations demonstrate sub-nanosecond quenching (≤1ns) and fast reset capability, allowing for a record high photon detection probability exceeding 90 %. The circuit maintains robustness across supply and process variations, validated through Monte Carlo and corner simulations. These results represent a significant advancement in SPAD quenching circuit design, offering PDP saturation.