<div class="csl-bib-body">
<div class="csl-entry">Fuchsberger, A., Knaller, N., Wind, L., Wahler, V., Nazzari, D., Weber, W. M., & Sistani, M. (2026). A Reconfigurable Transistor Enabling Adaptive Computing at Cryogenic Temperatures. <i>IEEE Electron Device Letters</i>, <i>47</i>(6), 1241–1244. https://doi.org/10.1109/LED.2026.3683584</div>
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dc.identifier.issn
0741-3106
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dc.identifier.uri
http://hdl.handle.net/20.500.12708/228712
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dc.description.abstract
Transistors operable at cryogenic temperatures are essential for the efficient control and readout of qubits. Yet conventional CMOS cannot meet the performance constraints at cryogenic temperatures due to dopant freeze-out and unacceptably high operation voltages. In this context, reconfigurable transistors emerge as a compelling alternative, enabling energy-efficient adaptive digital and analog circuitry at cryogenic temperatures. Here, we demonstrate a doping-free reconfigurable Si transistor with high and symmetric on-currents in both NMOS and PMOS mode at temperatures as low as 4.5K by replacing doped source/drain regions with gated Schottky junctions. Notably, inverse subthreshold slopes of 24mV/dec and 27mV/dec for NMOS and PMOS operation, respectively.
en
dc.description.sponsorship
FWF - Österr. Wissenschaftsfonds
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dc.language.iso
en
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dc.publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
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dc.relation.ispartof
IEEE Electron Device Letters
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dc.rights.uri
http://creativecommons.org/licenses/by/4.0/
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dc.subject
adaptive electronics
en
dc.subject
cryogenic CMOS
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dc.subject
Reconfigurable field-effect transistor
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dc.title
A Reconfigurable Transistor Enabling Adaptive Computing at Cryogenic Temperatures