<div class="csl-bib-body">
<div class="csl-entry">Fiedler, C., Preyser, F. J., & Kastner, W. (2019). Simulation of RPDEVS Models of Logic Gates. In U. Durak, C. Deatcu, & J. Hettwer (Eds.), <i>ASIM Workshop 2019 Simulation Technischer System Grundlagen und Methoden in Modellbildung und Simulation</i> (pp. 129–134). Arbeitsgemeinschaft Simulation ASIM in der Gesellschaft für Informatik GI. http://hdl.handle.net/20.500.12708/58017</div>
</div>
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dc.identifier.isbn
978-3-901608-06-3
-
dc.identifier.uri
http://hdl.handle.net/20.500.12708/58017
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dc.description.abstract
This paper addresses the simulation of fun-
damental logic gates (e.g. AND, OR, NOT) using the soft-
ware PowerRPDEVS that is based on the Revised Paral-
lel Discrete Event System Specification (RPDEVS) formalism.
The formal differences of the models of a NOR gate in
RPDEVS and PDEVS are analyzed. It is further shown,
which possible pitfalls may occur when connecting these
logic gates with feedbacks that cause algebraic loops and
in which cases these algebraic loops are resolved by the
RPDEVS simulation algorithm. For this purpose a static
RS flip-flop, a triggered D flip-flop and a shift register are
modeled and simulated in PowerRPDEVS. The results are
compared to previous research about the simulation of
such logic circuits in Simulink and Modelica.
en
dc.publisher
Arbeitsgemeinschaft Simulation ASIM in der Gesellschaft für Informatik GI
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dc.subject
Modeling and Simulation
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dc.subject
RPDEVS
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dc.subject
PowerRPDEVS
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dc.subject
Logic Simulation
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dc.title
Simulation of RPDEVS Models of Logic Gates
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dc.type
Konferenzbeitrag
de
dc.type
Inproceedings
en
dc.relation.publication
ASIM Workshop 2019 Simulation Technischer System Grundlagen und Methoden in Modellbildung und Simulation
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dc.relation.isbn
9783901608063
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dc.relation.doi
10.11128/arep.57
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dc.description.startpage
129
-
dc.description.endpage
134
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dc.type.category
Full-Paper Contribution
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dc.publisher.place
ARGESIM Report 57
-
tuw.booktitle
ASIM Workshop 2019 Simulation Technischer System Grundlagen und Methoden in Modellbildung und Simulation
-
tuw.relation.publisher
ARGESIM
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tuw.relation.publisherplace
Wien
-
tuw.publication.orgunit
E191-03 - Forschungsbereich Automation Systems
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dc.description.numberOfPages
6
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tuw.event.name
ASIM Workshop STS/GMMS 2019
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tuw.event.startdate
21-02-2019
-
tuw.event.enddate
22-02-2019
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tuw.event.online
On Site
-
tuw.event.type
Event for scientific audience
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tuw.event.place
Braunschweig
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tuw.event.place
Braunschweig
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tuw.event.country
EU
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tuw.event.presenter
Fiedler, Christian
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wb.sciencebranch
Informatik
-
wb.sciencebranch.oefos
1020
-
wb.facultyfocus
Computer Engineering (CE)
de
wb.facultyfocus
Computer Engineering (CE)
en
wb.facultyfocus.faculty
E180
-
wb.presentation.type
science to science/art to art
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item.grantfulltext
restricted
-
item.cerifentitytype
Publications
-
item.openairecristype
http://purl.org/coar/resource_type/c_5794
-
item.openairetype
conference paper
-
item.fulltext
no Fulltext
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crisitem.author.dept
E191-03 - Forschungsbereich Automation Systems
-
crisitem.author.dept
E640 - Vizerektorat Digitalisierung und Infrastruktur
