System level analysis of a highly digital transmitter for cellular application

Abstract

The radio frequency digital to analog converter (RFDAC) represents a new innovation step in digital to analog conversion that moves digital signal processing one step further by reducing the number of analog components a in transmitter circuit. An investigetion on RFDAC is considered to be very important, since it is expected that many future transmitter structures will contain an RFDAC. This work deals with system level analysis of the IQ RFDAC, which combines digital to analog conversion and mixing. Throughout the system level analysis all possible impairments are investigated, their influences on the signal are determined and a simulation setup is implemented to further understand the behavior of the IQ RFDAC in realistic conditions. Results gained from measurements on a test chip are also presented in this work and they are compared with the simulation results. Different signal patterns have been used for measurement and simulation in order to isolate different impairments. We can conclude from this investigation that the nonlinearities are the major factor for the degradation of the signal spectrum. Consequently, improvement suggestions are given, to enhance the performance of the IQ RFDAC. One of the improvements discovered and investigated is the suppression of the IQ time misalignment. This can be considered as the major result of this work. We state a mathematical proof for the suppression of IQ time misalignment as well as simulation and measurement results that confirm the mathematical proof. Therefore this technique will be implemented in IQ RFDAC architectures used by Intel.