SPIE VLSI Circuits and Systems
Event name
SPIE VLSI Circuits and Systems
Event type
Event for scientific audience
Start date
09-05-2005
End date
11-05-2005
Location
Sevilla, Spain
Country
Austria
Event format Veranstaltungsformat
On Site
Results 1-2 of 2 (Search time: 0.001 seconds).
| Preview | Authors / Editors | Title | Type | Issue Date | |
|---|---|---|---|---|---|
| 1 | Sheikholeslami, Alireza ; Heitzinger, Clemens ; Puchner, Helmut ; Badrieh, Fuad ; Selberherr, Siegfried | Simulation of Void Formation in Interconnect Lines | Präsentation Presentation | 2003 | |
| 2 | Holzer, Stefan ; Hollauer, Christian ; Ceric, Hajdin ; Wagner, Stephan ; Langer, Erasmus ; Grasser, Tibor ; Selberherr, Siegfried | Transient Electro-Thermal Investigations of Interconnect Structures Exposed to Mechanical Stress | Präsentation Presentation | 2005 |