Name Card

Full name Familienname, Vorname
Lechner, Jakob
 
Main Affiliation Organisations­zuordnung
 

Own Publications Eigene Publikationen

Results 1-18 of 18 (Search time: 0.005 seconds).

PreviewAuthor(s)TitleTypeIssue Date
1Schütz, Markus ; Steininger, Andreas ; Huemer, Florian ; Lechner, Jakob State Recovery for Coarse-Grain TMR Designs in FPGAs Using Partial ReconfigurationKonferenzbeitrag Inproceedings 2018
2Huemer, Florian ; Lechner, Jakob ; Steininger, Andreas A New Coding Scheme for Fault Tolerant 4-Phase Delay-Insensitive CodesKonferenzbeitrag Inproceedings 2016
3Lechner, Jakob ; Steininger, Andreas ; Huemer, Florian Methods for Analysing and Improving the Fault Resilience of Delay-Insensitive CodesKonferenzbeitrag Inproceedings 2015
4Naqvi, Syed Rameez ; Lechner, Jakob ; Steininger, Andreas Protection of Muller-Pipelines from transient faultsKonferenzbeitrag Inproceedings 2014
5Lechner Jakob - 2014 - Building robust GALS circuits fault-tolerant and...pdf.jpgLechner, Jakob Building robust GALS circuits : fault-tolerant and variation-aware design. Techniques for reliable circuit operationThesis Hochschulschrift 2014
6Lechner, Jakob ; Najvirt, Robert A Generic Architecture for Robust Asynchronous Communication LinksKonferenzbeitrag Inproceedings 2013
7Polzer, Thomas ; Steininger, Andreas ; Lechner, Jakob Muller C-Element Metastability ContainmentKonferenzbeitrag Inproceedings 2013
8Naqvi, Syed Rameez ; Steininger, Andreas ; Lechner, Jakob An SET Tolerant Tree Arbiter CellKonferenzbeitrag Inproceedings 2013
9Lechner, Jakob Designing Robust GALS Circuits with Triple Modular RedundancyKonferenzbeitrag Inproceedings 2012
10Lechner, Jakob ; Lampacher, Martin ; Polzer, Thomas A Robust Asynchronous Interfacing Scheme with Four-Phase Dual-Rail CodingKonferenzbeitrag Inproceedings 2012
11Lechner, Jakob ; Lampacher, Martin Protecting Pipelined Asynchronous Communication Channels Against Single Event UpsetsKonferenzbeitrag Inproceedings 2012
12Jeitler, Marcus ; Lechner, Jakob Low Latency Recovery from Transient Faults for Pipelined Processor ArchitecturesKonferenzbeitrag Inproceedings 2010
13Jeitler, Marcus ; Lechner, Jakob ; Steininger, Andreas Enhancing pipelined processor architectures with fast autonomous recovery of transient faultsKonferenzbeitrag Inproceedings 2010
14Jeitler, Marcus ; Lechner, Jakob Comparing the Robustness of Synchronous and Asynchronous Circuits by Fault InjectionKonferenzbeitrag Inproceedings 2009
15Jeitler, Marcus ; Lech, Jakob Speeding up Fault Injection for Asynchronous Logic by FPGA-Based EmulationKonferenzbeitrag Inproceedings 2009
16Lechner, Jakob ; Delvai, Martin Implementation of a Design Tool for Automated Generation of Four State Logic CircuitsKonferenzbeitrag Inproceedings 2008
17Lechner, Jakob Implementation of a design tool for generation of FSL circuitsThesis Hochschulschrift2008
18Ambrosch, K. ; Helpa, Christopher ; Lechner, Jakob ; Leidenfrost, Robert ; Panhofer, Thomas ; platschek, Andreas ; Ramberger, Stephan ; Stadler, Urban ; Steiner, D ; Trinkl, Harald ; Widtmann, Christian ; Delvai, Martin Design Variety in Hardware/Software Codesign - Implementations of an AES EncoderKonferenzbeitrag Inproceedings 2006

Contributing Publications Mitbeteiligte Publikationen

Results 1-1 of 1 (Search time: 0.001 seconds).

PreviewAuthor(s)TitleTypeIssue Date
1Pados, Károly Dávid Design and evaluation of an AXI4 bus systemThesis Hochschulschrift2013