Notice
This item was automatically migrated from a legacy system. It's data has not been checked and might not meet the quality criteria of the present system.
Record link: 
http://hdl.handle.net/20.500.12708/54501
-
Title: 
A Generic Architecture for Robust Asynchronous Communication Links
-
Citation: 
Lechner, J., & Najvirt, R. (2013). A Generic Architecture for Robust Asynchronous Communication Links. In Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation (pp. 121–130). Lecture Notes in Computer Science. http://hdl.handle.net/20.500.12708/54501
-
Publication Type: 
Inproceedings - Poster Contribution
en
Authors: 
Lechner, Jakob 
Najvirt, Robert 
-
Organisational Unit: 
E191-02 - Forschungsbereich Embedded Computing Systems 
-
Published in: 
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 
-
Date (published): 
2013
-
Event name: 
International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2012 
-
Event date: 
4-Sep-2012 - 6-Sep-2012
-
Event place: 
Newcastle upon Tyne, EU
-
Number of Pages: 
10
-
Publisher: 
Lecture Notes in Computer Science, 7606
-
Peer reviewed: 
Yes
-
Abstract: 
This paper proposes a new generic architecture for building robust communication links for globally asynchronous locally synchronous (GALS) circuits. The general idea is to use delay-insensitive codes along with error detecting codes to provide resilience against transient faults as well as robustness against delay variations. The presented link architecture is completely generic with respect to t...
en
Research Areas: 
Computational System Design: 100%
-
Science Branch: 
Mathematik, Informatik
-
Appears in Collections:
Conference Paper

Show full item record

Page view(s)

186
checked on Nov 23, 2023

Google ScholarTM

Check