<div class="csl-bib-body">
<div class="csl-entry">Zhang, S., Xia, Y., Li, C., Li, J., M.Y. Vardi, & Ganesh, V. (2026). Understanding CDCL Solvers via Scalability Studies and Proofdoors. In B. Dutertre & B. Könighofer (Eds.), <i>Proceedings of the 26th Conference on Formal Methods in Computer-Aided Design – FMCAD 2026</i> (pp. 37–49). TU Wien Academic Press. https://doi.org/10.34727/2026/isbn.978-3-85448-093-8_9</div>
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Over the past several decades, Conflict-Driven Clause Learning (CDCL) SAT solvers have proven remarkably effective on large industrial formulas, despite SAT being NP-complete and widely believed to be intractable. While considerable empirical research has been done on solver performance over benchmarks like the SAT competition, as well as scaling studies on random and crafted families, surprisingly little effort has gone into systematic scaling studies over industrial instances. To address this gap, we collect a large benchmark of Bounded Model Checking (BMC) instances (76,600 across 766 families) and perform a systematic scaling study of solver performance. We observe a spectrum: some families scale linearly, others polynomially or exponentially. Building on this foundation, we study the structural parameters that have been proposed in an attempt to explain this phenomenon. We first show that previously proposed parameters— clause-variable ratio, treewidth, and community structure—fail to discriminate between the linear and exponential regimes. By contrast, properties of the recently proposed proofdoor parameter correlate well with CDCL solver performance. Informally, a proofdoor is a sequence of interpolants between chunks of a formula, where each interpolant represents the solver’s memoization of reasoning effort on chunks it has already analyzed. In support of the proofdoor hypothesis, we make three key contributions. First, we empirically show that CDCL solvers usually do compute small proofdoors for linearly-scaling BMC instances. Second, we show that for exponentially-scaling instances, sampled proofdoors scale exponentially and are typically not incrementally absorbed. Third, we show that scrambling linearly-scaling instances yields larger proofdoor sizes relative to pre-scrambling, relating poor branching orders to larger proofdoor sizes and degradation in solver performance.
en
dc.language.iso
en
-
dc.rights.uri
http://creativecommons.org/licenses/by/4.0/
-
dc.subject
formal methods
en
dc.subject
computer-aided system design
en
dc.subject
hardware and system verification
en
dc.title
Understanding CDCL Solvers via Scalability Studies and Proofdoors
en
dc.type
Inproceedings
en
dc.type
Konferenzbeitrag
de
dc.rights.license
Creative Commons Namensnennung 4.0 International
de
dc.rights.license
Creative Commons Attribution 4.0 International
en
dc.identifier.doi
10.34727/2026/isbn.978-3-85448-093-8_9
-
dc.contributor.affiliation
Georgia Tech Foundation, United States of America (the)
-
dc.contributor.affiliation
East China Normal University, China
-
dc.contributor.affiliation
Extreme Networks, Toronto, Canada
-
dc.contributor.affiliation
East China Normal University, China
-
dc.contributor.affiliation
Rice University, United States of America (the)
-
dc.contributor.affiliation
Georgia Institute of Technology - Institute for Data Engineering and Science (IDEaS - AI for Science) at Georgia Tech (Atlanta, US)
-
dc.contributor.editoraffiliation
Amazon Web Services
-
dc.contributor.editoraffiliation
Graz University of Technology (Graz, AT)
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dc.relation.isbn
978-3-85448-093-8
-
dc.description.volume
7
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dc.description.startpage
37
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dc.description.endpage
49
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dc.rights.holder
the authors
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dc.type.category
Full-Paper Contribution
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dc.relation.eissn
2708-7824
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tuw.booktitle
Proceedings of the 26th Conference on Formal Methods in Computer-Aided Design – FMCAD 2026
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tuw.peerreviewed
true
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tuw.relation.ispartof
10.34727/2026/isbn.978-3-85448-093-8
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tuw.relation.publisher
TU Wien Academic Press
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tuw.book.chapter
9
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I1
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tuw.researchTopic.id
I2
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tuw.researchTopic.id
C5
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tuw.researchTopic.name
Logic and Computation
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tuw.researchTopic.name
Computer Engineering and Software-Intensive Systems
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tuw.researchTopic.name
Computer Science Foundations
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40
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40
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20
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tuw.publication.orgunit
E000 - Technische Universität Wien
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dc.identifier.libraryid
AC17999054
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dc.description.numberOfPages
13
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Conference Series: Formal Methods in Computer-Aided Design
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tuw.author.orcid
0000-0002-0661-5773
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tuw.author.orcid
0000-0002-6029-2047
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dc.contributor.serieseditor
Hunt, Warren A., Jr.
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dc.contributor.serieseditor
Weissenbacher, Georg
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dc.rights.identifier
CC BY 4.0
de
dc.rights.identifier
CC BY 4.0
en
tuw.editor.orcid
0000-0002-6284-380X
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tuw.editor.orcid
0000-0001-5183-5452
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wb.sciencebranch
Informatik
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1020
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100
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Open Access
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Publications
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en
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http://purl.org/coar/resource_type/c_5794
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conference paper
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crisitem.author.dept
Georgia Tech Foundation, United States of America (the)
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crisitem.author.dept
East China Normal University, China
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crisitem.author.dept
Extreme Networks, Toronto, Canada
-
crisitem.author.dept
East China Normal University, China
-
crisitem.author.dept
Rice University, United States of America (the)
-
crisitem.author.dept
Georgia Institute of Technology - Institute for Data Engineering and Science (IDEaS - AI for Science) at Georgia Tech (Atlanta, US)