Time-Triggered Ethernet and IEEE 1588 Clock Synchronization

Abstract

The Time-Triggered Ethernet unifies real-time and non-real-time traffic into a single communication architecture. We have built a prototype implementation of an FPGA TT-Ethernet switch and an FPGA TT Ethernet communication controller supporting a network bandwidth of 100Mbit/sec. Time-Triggered Ethernet introduces two message classes, i) the standard eventtriggered Ethernet messages, denoted as ET messages, and ii) the time-triggered Ethernet messages, denoted as TT messages. All TT messages are transmitted periodically and are scheduled a priori in a way that there are no conflicts on the network. The network handles these messages according to the cut-through paradigm. Computer nodes containing TT Ethernet communication controllers establish and maintain global time base. However nodes containing standard Ethernet controllers can be connected to a TT Ethernet system and can send ET messages without affecting the temporal properties of the TT messages. The global time format of the TT Ethernet deploys the UTC time format which is compatible with the time format of the IEEE 1588 standard. In these work we present how we deploy the IEEE 1588 in order to synchronize the TT Ethernet controllers which require a tight synchronization among them. Additionally the IEEE 1588 clock synchronization based protocol will be implemented at standard Ethernet controllers such that they can be establish and maintain a global time base.