Record link: 
http://hdl.handle.net/20.500.12708/58017
-
Title: 
Simulation of RPDEVS Models of Logic Gates
-
Citation: 
Fiedler, C., Preyser, F. J., & Kastner, W. (2019). Simulation of RPDEVS Models of Logic Gates. In U. Durak, C. Deatcu, & J. Hettwer (Eds.), ASIM Workshop 2019 Simulation Technischer System Grundlagen und Methoden in Modellbildung und Simulation (pp. 129–134). Arbeitsgemeinschaft Simulation ASIM in der Gesellschaft für Informatik GI. http://hdl.handle.net/20.500.12708/58017
-
Publication Type: 
Inproceedings - Full-Paper Contribution
en
Authors: 
Fiedler, Christian 
Preyser, Franz Josef 
Kastner, Wolfgang 
-
Organisational Unit: 
E191-03 - Forschungsbereich Automation Systems 
-
Published in: 
ASIM Workshop 2019 Simulation Technischer System Grundlagen und Methoden in Modellbildung und Simulation 
-
ISBN: 
9783901608063
-
DOI of the book: 
10.11128/arep.57
-
Date (published): 
2019
-
Event name: 
ASIM Workshop STS/GMMS 2019 
-
Event date: 
21-Feb-2019 - 22-Feb-2019
-
Event place: 
Braunschweig, EU
-
Number of Pages: 
6
-
Publisher: 
Arbeitsgemeinschaft Simulation ASIM in der Gesellschaft für Informatik GI, ARGESIM Report 57
-
Publisher: 
ARGESIM, Wien
-
Keywords: 
Modeling and Simulation; RPDEVS; PowerRPDEVS; Logic Simulation
-
Abstract: 
This paper addresses the simulation of fun- damental logic gates (e.g. AND, OR, NOT) using the soft- ware PowerRPDEVS that is based on the Revised Paral- lel Discrete Event System Specification (RPDEVS) formalism. The formal differences of the models of a NOR gate in RPDEVS and PDEVS are analyzed. It is further shown, which possible pitfalls may occur when connecting these logic gates with feedbacks that cause algebraic loops and in which cases these algebraic loops are resolved by the RPDEVS simulation algorithm. For this purpose a static RS flip-flop, a triggered D flip-flop and a shift register are modeled and simulated in PowerRPDEVS. The results are compared to previous research about the simulation of such logic circuits in Simulink and Modelica.
en
Science Branch: 
Informatik
-
Appears in Collections:
Conference Paper

Show full item record

Page view(s)

165
checked on Nov 23, 2023

Google ScholarTM

Check