Xu, D., Ningmei, Y., Huang, H., Pudukotai Dinakarrao, S. M., & Yu, H. (2017). Q-Learning-Based Voltage-Swing Tuning and Compensation for 2.5-D Memory-Logic Integration. IEEE Design and Test, 35(2), 91–99. https://doi.org/10.1109/mdat.2017.2764075
Electrical and Electronic Engineering; Software; Hardware and Architecture; Q-learning; Through-silicon interposer (TSI); memory-logic integration; voltage-swing tuning; receiver compensation; low power I/O
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Abstract:
In this paper, an I/O management with Q-Learning based Transmitter Swing Adjustment and Receiver Compensation is developed for an energy-efficient 2.5D memory-logic integration. Instead of transmitting signal with fixed large voltage swing, a Q-learning algorithm and receiver signal compensation mechanism are deployed to adaptively adjust the I/O output-voltage swing, so as to leverage the trade-off between the power reduction and bit error rate (BER). Simulation results show that the proposed adaptive 2.5D I/Os (in 65nm CMOS) can achieve an average of 13mW I/O power, 4GHz bandwidth and 3:25pJ=bit energy efficiency for one channel under 10^-6 BER. With the use of Q-learning and further receiver compensation, we can achieve 12.95% and 15.61% power reduction and 14% energy efficiency improvement compared to the use of constant output-voltage swing based I/O communication.
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Research Areas:
Logic and Computation: 40% Computer Science Foundations: 20% Computational System Design: 40%
