|Title:||Predictive and efficient modeling of hot carrier degradation with drift-diffusion based carrier transport models||Other Titles:||Prediktive und Effiziente Modellierung der Degradation durch heiße Ladungsträger mittels drift-diffusions-basierten Transportmodellen||Language:||English||Authors:||Sharma, Prateek||Qualification level:||Doctoral||Advisor:||Grasser, Tibor||Issue Date:||2020||Citation:||
Sharma, P. (2020). Predictive and efficient modeling of hot carrier degradation with drift-diffusion based carrier transport models [Dissertation, Technische Universität Wien]. reposiTUm. https://doi.org/10.34726/hss.2021.88962
|Number of Pages:||126||Qualification level:||Doctoral||Abstract:||
Reliability in metal oxide semicondcutor (MOS) transistors is an important concern due to their use in crucial fields like space, military, medical, and several consumer products. As the electric fields in MOS devices increase, so does the probability of failure due to high energy carriers. Thus, simulation of these semiconductor devices before production is vital for optimizing the device designs and assessing their lifetimes. Simulation of degradation due to high energy carriers is challenging as carrier transport needs to be addressed to obtain the carrier energy distribution function (DF) via solution of the Boltzmann transport equation (BTE). This is a complicated and computationally demanding task. In laterally diffused metal-oxide semiconductor (LDMOS) transistors, for example, their large dimensions, peculiar architecture and high operating voltages make the solution of the BTE challenging. In scaled devices, on the other hand, scattering effects become dominant which makes the estimation of the DF difficult. For this purpose, a drift-diffusion based approach is suggested which captures both the hot and cold carriers in the device. As a reference, a solution of the Boltzmann transport equation is performed using the spherical harmonics expansion method. The validity of the DD based approach is tested on LDMOS transistors by simulating the degradation characteristics like the interface state generation rates, the interface state density profiles, and changes of the linear and saturation drain currents as well as the threshold voltage shift and comparing with the spherical harmonics expansion (SHE) based approach as well as measurements. The applicability of different available analytic models for the DF has also been analyzed, namely the heated Maxwellian, the Cassi model, the Hasnat approach, as well as the Reggiani model. The DFs obtained from the different approaches are used as input for the physical HCD model and device degradation characteristics are determined. It is shown that the heated Maxwellian approach leads to an underestimation of HCD at long stress times. This trend is also typically observed for the Cassi and Hasnat models but in these models HCD is underestimated in the entire stress time window. While the Reggiani model gives good results in the channel and drift regions, it cannot properly represent the high-energy tails of the DF near the drain, and thus leads to a weaker curvature of the degradation traces. The analytical model for the carrier DF used in this work is capable of capturing DFs with very good accuracy and, as a result, the change of the device characteristics with stress time. Since the expression for the DF considers the contribution of both the hot and equilibrium carriers, it is well suited for the HCD model used which takes into account the single-carrier and multiple-carrier processes. The comparison of different realizations of the model shows that HCD captured by the DD based approach suggested in this work is very similar to the SHE based approach and matches the experiments quite well. Particular attention is paid to study the role of the colder fraction of the carrier ensemble. The role of cold carriers is checked by neglecting their effect in HCD modeling in LDMOS devices stressed at high voltages. In the proposed model, cold carriers are represented by the corresponding term in the analytic formula for the carrier distribution function as well as by the multiple-carrier process of the Si-H bond dissociation. It is shown that even in high-voltage devices stressed at high drain voltages the thermalized carriers still have a substantial contribution to HCD. These results contradict the previous conception that cold carriers are not important for HCD in power MOSFETs. The limits of the DD based HCD scheme is determined using devices of different dimensions. A comparison of carrier distribution functions, bond breakage rates, interface state density profiles, and changes of device characteristics such as the saturation and drain currents obtained from SHE and DD based approaches for MOSFETs with different channel lengths suggests that this DD based approach is not suited for channel lengths less than 1.5 μm. Also, in scaled devices mechanisms like electron-electron scattering start to affect the DF which cannot be captured with a simplistic approach. Thus, the simplistic DD-based HCD model is extended to the case of decananometer transistors. Special attention is paid to the effect of electron-electron scattering, which populates the high energy tail of the carrier distribution function, by using a rate balance equation. Finally, the accuracy and limits of applicability of the DD-based model are discussed concluding that the model is able to capture hot-carrier degradation in MOSFETs over a range of gate lengths with excellent accuracy.
|Keywords:||Bauelementzuverlässigkeit; Degradation durch heiße Ladungsträger; Drift-Diffusion Transportmodelle; MOSFET
Reliability of Devices; Hot-Carrier Degradation; Drift-Diffusion Transportmodelling; MOSFET
|DOI:||10.34726/hss.2021.88962||Library ID:||AC16158406||Organisation:||E360 - Institut für Mikroelektronik||Publication Type:||Thesis
|Appears in Collections:||Thesis|
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