Hierarchical grid algorithms for topography simulation

Abstract

The continuously high pace of semiconductor device developments puts massive pressure on novel device designs and on manufacturing processes. Technology computer-aided design tools are critically important to aid these processes and, thereby, help reduce costly conventional experimental efforts. One key tool in the process technology computer-aided design tool-chain is topography simulation. Topography simulations allow to describe a plethora of time-dependent processing steps which change the wafer surface topography (e.g., etching or deposition). The geometry, i.e., the topography, of modern semiconductor devices has become ever more critical in recent years due to the use of new materials and vertical structures with high aspect ratio. However, semiconductor device topographies are characterized by large areas with little to no geometric variation (e.g., flat parts of the topography) and small areas with pronounced geometric variation (e.g., sharp corners) -- so-called features -- for example, trench or hole structures which are very common in modern memory devices. This, in principle, requires an increase of the resolution of specific areas of interest of the simulation domain to accurately capture these features, which is efficiently achieved using a hierarchical grid. However, it has to be considered that the higher the resolution of the simulation domain is chosen, the bigger the detrimental impact on simulation performance, potentially leading to unpractical simulation run-times. Therefore, to improve simulation performance, strategies that automatically detect topographical featuresand locally adapt the configuration of the hierarchical grid accordingly are required. A well-known metric that measures the geometric variation of a surface is the surface curvature, which is often used for automatic feature detection. This, however, first requires the availability of surfaces, and for that different surface representations are available, which can be broadly categorized into explicit and implicit representations. Depending on the type of simulation, certain surface representations have advantages over others. Implicit surfaces intrinsically handle the merging of materials during a simulation, while explicit surfaces improve the performance of flux calculations.In this work, new geometry-aware algorithms for surfaces originating from topography simulations are introduced. The algorithms automatically detect features of the device topography. The detected features are then used to improve the simulation performance of topography simulations by locally adapting the resolution of the hierarchical grid. A general feature detection algorithm for topography simulations was developed and is presented here. Four different methods for calculating the surface curvatures of level-set functions (i.e., implicit surface representation) are investigated. Three of the investigated methods are taken from literature, and one is a novel improvement of the de facto standard method. The novel method has a higher numerical accuracy than the other methods, while only insignificantly increasing the computational effort, making it the optimal choice for feature detection for semiconductor topography simulations.The feature detection algorithm is used to guide a hierarchical grid placement algorithm, which locally increases the resolution of the simulation domain around features of the topography. This hierarchical grid placement algorithm is integrated into a topography simulation workflow and used to simulate selective epitaxial growth of SiGe for evaluation purposes. The simulation performance is improved by up to 58% while maintaining accuracy. Another developed algorithm improves the simulation performance of thin material layer etching, which is a common fabrication technique. The etching process can be simulated with Boolean operations between implicitsurfaces. Depending on the thickness of the etched material layer, numerical artifacts develop. A specialized feature detection algorithm is presented that analyzes the thickness of the material layers and calculates a minimal required resolution to prevent the formation of numerical artifacts.The developed feature detection algorithm can also be used to selectively simplify the simulated topography of a wafer. Therefore, a surface mesh (i.e., explicit surface) simplification algorithm is presented, which considers the features of the surface. This simplification algorithm maintains a high resolution at features of the topography, while simplifying non-features to a greater degree. The simplified surface meshes are then shown to improve the computational performance of flux calculations simulated with Monte Carlo ray tracing by 15%.