Record link: 
http://hdl.handle.net/20.500.12708/200791
https://doi.org/10.34727/2024/isbn.978-3-85448-065-5_24
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Title: 
Verified Substitution Redundancy Checking
en
Citation: 
Codel, C., Avigad, J., & Heule, M. J. H. (2024). Verified Substitution Redundancy Checking. In N. Narodytska & P. Rümmer (Eds.), Proceedings of the 24th Conference on Formal Methods in Computer-Aided Design – FMCAD 2024 (pp. 186–196). TU Wien Academic Press. https://doi.org/10.34727/2024/isbn.978-3-85448-065-5_24
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reposiTUm DOI: 
10.34727/2024/isbn.978-3-85448-065-5_24
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CatalogPlus: 
AC17313120
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Publication Type: 
Inproceedings - Full-Paper Contribution
en
Language: 
English
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Authors: 
Codel, Cayden 
Avigad, Jeremy 
Heule, Marijn J. H. 
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Editors: 
Narodytska, Nina 
Rümmer, Philipp 
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Organisational Unit: 
E192 - Institut für Logic and Computation
E192-04 - Forschungsbereich Formal Methods in Systems Engineering
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Series: 
Conference Series: Formal Methods in Computer-Aided Design 
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Published in: 
Proceedings of the 24th Conference on Formal Methods in Computer-Aided Design – FMCAD 2024 
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ISBN: 
978-3-85448-065-5
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Date (published): 
Oct-2024
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Number of Pages: 
11
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Publisher: 
TU Wien Academic Press, Wien
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Peer reviewed: 
Yes
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Keywords: 
formale Methode
de
 
formal methods
en
Research Areas: 
Logic and Computation: 40%
Computer Engineering and Software-Intensive Systems: 40%
Computer Science Foundations: 20%
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Science Branch: 
1020 - Informatik: 100%
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License: 
CC BY 4.0 CC BY 4.0
de
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Verified Substitution Redundancy Checking
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