Record link: 
http://hdl.handle.net/20.500.12708/219560
https://doi.org/10.34727/2025/isbn.978-3-85448-084-6_30
-
Title: 
Unlocking Hardware Verification with Oracle Guided Synthesis
en
Citation: 
Ye, L., Li, Y., frankel, guy, Cheng, J., & Polgreen, E. (2025). Unlocking Hardware Verification with Oracle Guided Synthesis. In A. Irfan & D. Kaufmann (Eds.), Proceedings of the 25th Conference on Formal Methods in Computer-Aided Design – FMCAD 2025 (pp. 235–245). TU Wien Academic Press. https://doi.org/10.34727/2025/isbn.978-3-85448-084-6_30
-
reposiTUm DOI: 
10.34727/2025/isbn.978-3-85448-084-6_30
-
CatalogPlus: 
AC17653248
-
Publication Type: 
Inproceedings - Full-Paper Contribution
en
Language: 
English
-
Authors: 
Ye, Leiqi 
Li, Yixuan 
frankel, guy 
Cheng, Jianyi 
Polgreen, Elizabeth 
-
Editors: 
Irfan, Ahmed 
Kaufmann, Daniela 
-
Organisational Unit: 
E000 - Technische Universität Wien 
-
Series: 
Conference Series: Formal Methods in Computer-Aided Design 
-
Published in: 
Proceedings of the 25th Conference on Formal Methods in Computer-Aided Design – FMCAD 2025 
-
ISBN: 
978-3-85448-084-6
-
Date (published): 
2025
-
Number of Pages: 
11
-
Publisher: 
TU Wien Academic Press, Wien
-
Peer reviewed: 
Yes
-
Keywords: 
formal methods; computer-aided system design; hardware and system verification
en
Is part of: 
10.34727/2025/isbn.978-3-85448-084-6
-
Research Areas: 
Logic and Computation: 40%
Computer Engineering and Software-Intensive Systems: 40%
Computer Science Foundations: 20%
-
Science Branch: 
1020 - Informatik: 100%
-
License: 
CC BY 4.0 CC BY 4.0
de
Appears in Collections:
Conference Paper
Open Access Series

Fulltext (Version of Record (published version))
Adobe PDF
(596.52 kB)
Open Access CC BY 4.0
Show full item record

Page view(s)

1,588
checked on Sep 30, 2025

Download(s)

243
checked on Sep 30, 2025

Google ScholarTM

Check