Modelling of repetitive avalanche degradation in power trench MOSFETs

Abstract

The avalanche breakdown of compensated trench power MOSFETs is investigated. Among other parameters, the drain-source breakdown voltage is heavily influenced by electrical stress. This is caused by the degradation of the trench oxide and its silicon interface. The stress mechanism in the application of the devices is repetitive avalanche, which is compared to constant-current stress. It has been found that the current density of stress plays a major role in the degradation mechanism. The chargeable defect trap levels caused by hot-carrier injection during avalanche and their impact on electrical parameters of the devices are characterized. Charge pumping allows not only a quantitative determination of the generated defect densities but also energetic and spatial profiling. In addition to Si-SiO2 interface traps, border traps have been detected by frequency-dependent charge pumping. Their influence on the stress characteristic of the drain-source breakdown voltage is discussed. The thesis is based on work carried out at Infineon Technologies Austria AG.