Record link: 
http://hdl.handle.net/20.500.12708/15506
http://dx.doi.org/10.34727/2020/isbn.978-3-85448-042-6_10
-
Title: 
Runtime Verification on FPGAs with LTLf Specifications
en
Citation: 
Tracy II, T., Tabajara, L. M., Vardi, M., & Skadron, K. (2020). Runtime Verification on FPGAs with LTLf Specifications. In A. Ivrii & O. Strichman (Eds.), Proceedings of the 20th Conference on Formal Methods in Computer-Aided Design – FMCAD 2020 (pp. 36–46). TU Wien Academic Press. https://doi.org/10.34727/2020/isbn.978-3-85448-042-6_10
-
reposiTUm DOI: 
10.34727/2020/isbn.978-3-85448-042-6_10
-
Publication Type: 
Konferenzbeitrag
de
 
Inproceedings
en
Language: 
English
-
Authors: 
Tracy II, Tommy 
Tabajara, Lucas M. 
Vardi, Moshe 
Skadron, Kevin 
-
Editors: 
Ivrii, Alexander 
Strichman, Ofer 
-
Organisational Unit: 
E192-04 - Forschungsbereich Formal Methods in Systems Engineering 
-
Series: 
Conference Series: Formal Methods in Computer-Aided Design 
-
Published in: 
Proceedings of the 20th Conference on Formal Methods in Computer-Aided Design – FMCAD 2020 
-
Volume: 
1
-
Date (published): 
2020
-
Number of Pages: 
11
-
Publisher: 
TU Wien Academic Press
-
Publisher: 
Wien
-
Keywords: 
computer-aided system design
en
Linked records in reposiTUm: is part of: 
10.34727/2020/isbn.978-3-85448-042-6
-
License: 
CC BY 4.0 CC BY 4.0
en
Appears in Collections:
Open Access Series
Conference Paper

Thumbnail
10_Runtime Verification on FPGAs with LTLf Specifications.pdf
Adobe PDF
(730.88 kB)
Published version
Open Access
Show full item record

This item is licensed under a Creative Commons License Creative Commons

Page view(s)

386
checked on Mar 4, 2023

Download(s)

138
checked on Mar 4, 2023

Google ScholarTM

Check