Record link: 
http://hdl.handle.net/20.500.12708/162143
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Title: 
Hierarchical Simulation of Process Variations and Their Impact on Circuits and Systems: Methodology
en
Citation: 
Lorenz, J., Bär, E., Clees, T., Jancke, R., Salzig, C., & Selberherr, S. (2011). Hierarchical Simulation of Process Variations and Their Impact on Circuits and Systems: Methodology. IEEE Transactions on Electron Devices, 58(8), 2218–2226. https://doi.org/10.1109/ted.2011.2150225
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Publisher DOI: 
10.1109/ted.2011.2150225
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Publication Type: 
Artikel - Original Research Article
de
 
Article - Original Research Article
en
Language: 
English
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Authors: 
Lorenz, J. 
Bär, E. 
Clees, T. 
Jancke, Roland 
Salzig, C. 
Selberherr, Siegfried 
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Organisational Unit: 
E360 - Institut für Mikroelektronik 
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Journal: 
IEEE Transactions on Electron Devices 
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ISSN: 
0018-9383
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Date (published): 
16-Jun-2011
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Number of Pages: 
9
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Publisher: 
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
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Peer reviewed: 
Yes
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Keywords: 
Electrical and Electronic Engineering; Electronic, Optical and Magnetic Materials
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Research Areas: 
Modelling and Simulation: 100%
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Science Branch: 
Elektrotechnik, Elektronik
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