The impact of annealing temperature and annealing duration on the interface properties of n-Ge/Y₂O₃/Pt MOS-capacitors is investigated employing an ultrathin catalytically acting Pt-layer. X-ray photoelectron spectroscopy analysis has been used to verify an enhanced growth of GeO₂ and thermally stabilizing yttrium germanate at the n-Ge/Y₂O₃ interface induced by an oxygen post deposition annealing (PDA). Especially at 500 °C and 550 °C high quality Ge/Y₂O₃ interfaces have been achieved resulting in very low interface trap density of 7.41∗10¹⁰ eV⁻¹ cm⁻². It is shown that either a short oxygen annealing at higher temperatures (550 °C) or a long time annealing at lower temperatures (450 °C) are appropriate to realize low interface trap density (Dᵢₜ). It turns out that a Pt-assisted PDA in combination with a final PMA are needed to reduce hysteresis width significantly and to bring flat band voltages toward ideal values.
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Research Areas:
Special and Engineering Materials: 30% Surfaces and Interfaces: 50% Nanoelectronics: 20%