Btor2MLIR: A Format for Hardware Verification

Tafese, Joseph; Gurfinkel, Arie; Garcia-Contreras, Isabel

doi:10.34727/2023/isbn.978-3-85448-060-0_13

Record link:

http://hdl.handle.net/20.500.12708/188764
https://doi.org/10.34727/2023/isbn.978-3-85448-060-0_13

Title:

Btor2MLIR: A Format for Hardware Verification

Citation:

Tafese, J., Gurfinkel, A., & Garcia-Contreras, I. (2023). Btor2MLIR: A Format for Hardware Verification. In A. Nadel & K. Y. Rozier (Eds.), Proceedings of the 23rd Conference on Formal Methods in Computer-Aided Design – FMCAD 2023 (pp. 55–63). TU Wien Academic Press. https://doi.org/10.34727/2023/isbn.978-3-85448-060-0_13

reposiTUm DOI:

10.34727/2023/isbn.978-3-85448-060-0_13

CatalogPlus:

AC17203939

Publication Type:

Inproceedings - Full-Paper Contribution

Language:

English

Authors:

Tafese, Joseph
Gurfinkel, Arie
Garcia-Contreras, Isabel

Editors:

Nadel, Alexander
Rozier, Kristin Yvonne