Realization of a complementary full adder based on reconfigurable transistors

Abstract

Fine grain reconfigurability carried out at the transistor level, i.e. the ability to switch between n- and p-type operation, offers new possibilities for highly efficient logic gates. In particular, XOR- and Majority gate circuit implementations can considerably benefit from reconfigurable transistors, as they require less than half of the transistor count needed in conventional static CMOS technology. Using a total of eight highly on-state symmetric reconfigurable field effect transistors fabricated from monolithic Al-Si heterostructures, we experimentally demonstrate a fully functional full adder, a fundamental circuit for many arithmetic applications. The two slightly adapted reconfigurable XOR gates for sum and carry output provide a full output voltage swing using only a single symmetric supply rail, while achieving very low static power consumption due to complementary circuit design and inherent leakage suppression of the devices. Furthermore, their stable operation against input voltage variations is demonstrated with static and transient measurements.