Temperature-dependent electronic transport in reconfigurable transistors based on Ge on SOI and strained SOI platforms

Abstract

Integrating Ge onto SOI should enhance the drive currents and switching speeds of transistors. However, Ge on insulator platforms have fallen short of providing these benefits and are additionally facing processing issues and high fabrication costs. To cope with these issues, we use an ultra-low-temperature molecular-beam epitaxy growth of Ge layers on SOI and strained SOI substrates, as device prototyping platforms. Thereof, we obtain symmetric IV-on-states in Ge based reconfigurable transistors, enabling to investigate the temperature-dependent gating capabilities and identify the dominant transport mechanisms. In this respect, to give a comprehensive picture of the influence of different parameters on transport mechanisms, temperature-dependent gate- and bias-dependent current–voltage data was evaluated constructing 2-D colormap representations.